DP83867IR: Communication error after noise applied

Hi,

Can you read registers to get a log for the PHY condition before and after the EFT tests?

Please read registers 0x0 - 0x1F as well as 0x467 and 0x468.

Is it possible to get a schematic and layout?

Hello Ross-san,

The customer is working to correct the register information. We couldn't find 0x467 and 0x468 information in datasheet.

Do we think ok they are hidden registers?

Best regards,

Toshihiro Watanabe

Hello Ross-san,

Here is the register dump before and after noise test. The customer did 3 times noise test then after noise test, 0x13 value was changed from 0x0000 to 0x0004.

DP83867_registerdump.xlsx

[Questions]

1) What error is xGMII Error?

2) When applied noise on cable, is xGMII Error occur reasonable?

3) How to recover from error condition when xGMII Error occurs?

4) In the customer environment, link is recovered if cable is disconnect then re-connect. Is this reasonable?

XGMII_ERR_INT might trig INT/PWDN pin but the customer does not use this pin.

Best regards,

Toshihiro Watanabe 

Hello Ross-san,

I would like to know the result is reasonable which GMII error occurs when EFT noise applied on the cable.

If this is reasonable result, we can know this status by watching 0x13 and could do something to avoid communication error.

Could you support this?

Best regards,

Toshihiro Watanabe

Hello Ross-san,

Could you support the customer questions?

Best regards,

Toshihiro Watanabe

Hello Ross-san,

Any update?

Best regards,

Toshihiro Watanabe

Hello Ross-san,

Coudl you support these questions?

[Questions]

1) What error is xGMII Error?

2) When applied noise on cable, is xGMII Error occur reasonable?

3) How to recover from error condition when xGMII Error occurs?

4) In the customer environment, link is recovered if cable is disconnect then re-connect. Is this reasonable?

Best regards,

Toshihiro Watanabe

Hi Toshihiro-san,

Please provide the details of the test customer run. We have run the Immunity test on DP83867 and results are documented in User Guide.

http://www.ti.com/tool/TIDA-00204

Regards,

Geet

Hello Geet-san,

The customer can understand DP83867 would have an ability to pass immunity test. Their point is not which DP83867 fails or not in EFT test. The customer setup might have some weak point.

In the customer setup, communication stops after EFT test. The condition communication stopped is not good for system so they want to know below items.

1) How to detect this issue which communication stopps by register 0x13 value changed?

2) How to recover from this situation?

The customer will implement the workaround by software when the customer can know how to detect and how to recover this issue.

Could you help us?

Best regards,

Toshihiro Watanabe

Hello,

Could you support about workaround how to detect and how to recover this mode?

Best regards,

Toshihiro Watanabe

Hello,

The customer tested below then communication was recovered.

1) watch address 0x13 value periodically.

2) When address 0x13 value changed, apply address 0x00 to reset

However the customer wants to confirm this workaround is robust.

When issue occurs, xGMII error is occurs.

[Question]

1) What is xGMII error?

2) Is it reasonable xGMII error recovers and communication recovers when RESET is applied?

I think to apply reset would be robust workaround however needed background information. I think this can be known, this could be closed.

Could you support the questions?

Best regards,

Toshihiro Watanabe

Hello Geet-san,

What is the issue not progress the discussion. The customer wants to implement workaround in case the system fell into this mode, stopping communication.

Why address 0x13 becomes 0x0004, communication stops?

Is reset reasonable way to recover from this mode?

I think the customer can implement the workaround if these items can be clear.

Best regards,

Toshihiro Watanabe

Hello Toshihiro-san,

I will be taking over this e2e thread. Do you have a crystal on your board and if so, could you share with me the specs and whether it meets the requirements on the datasheet?

Thanks,

Cecilia

Hi Cecilia,

Please check the crystal speck.

SiT8008AI-72-18E-25.000000E

https://www.sitime.com/sites/default/files/mature-datasheets/SiT8008-datasheet.pdf

Thanks,

Yuta Ishii

Hello Cecilia-san,

The oscillator which customer uses will be satisfied the spec which describe DP83867 datasheet.

Could you answer the questions below?

1) What is xGMII error?

2) Is it reasonable xGMII error recovers and communication recovers when RESET is applied?

Applying reset to PHY will be a good workaround to get out from the communication issue however the customer would like to know more information to understand RESET work around is robust solution from what error it is and its error can be clear by reset.

Best regards,

Toshihiro Watanabe

Hello Cecilia-san,

Could you let us know what is indicating xGMII error and RESET can be clear the status relating xGMII error relating?

Best regards,

Toshihiro Watanabe

Hi Toshihiro,

It looks as the errors are occurring on your xGMII lines. Which interface are you using for your application? MII, GMII, RGMII?

Are you applying RESET to clear the xGMII errors? Do the errors appear again after you RESET?

Thanks,

Cecilia

Hello Cecilia-san,

Interface is RGMII. When applied RESET, Communication is recovered. Which will be xGMII error is clear by RESET. We don't see error so far if no additional EFT noise applied.

The customer write 0x8000 to address 0x00 then communication is recovered. Is this enough workaround for this xGMII error issue?

Best regards,

Toshihiro Watanabe

Hello Cecillia-san,

No, I mean address 0x0000 (BMCR)\, 0x8000 write which is RESET applied to DP83822. This worked for the issue. Is this enough for recovering the issue?

Best regards,

Toshihiro Watanabe,

Hi Toshihiro,

This will work but I am also wondering if you can try write 0x4000 for address 0x001f and see if that will also work. This is also a RESET but should keep all the register values the same.

Thanks,

Cecilia