DS90UB927Q-Q1: DS90UB927Q-Q1 and DS90UB924-Q1 link problems

Hi,

Do you have local I2C access to the 924 side?

Could you check if you are getting lock by reading 924 register 0x1C[0]?

Could you check if I2C Pass-Through Mode is set for both 927 and 924? 

If you cannot read 924 ID from 927, likely there's link issues. 

Best Regards,

Charley Cai

Hi

Thanks for the reply, I tried to read 0x1c[0] of the 924 chip, and it answered 0x02.It doesn't look locked .

I tried to read the data values of registers 0x03, 0x05,0x06 and 0x07.then 0xf8, 0x80,  0x07 and 0x18 are returned.

While reading the 924 chip, 927 has been trying to read the address of 924, but there has been no reply. Am I missing something :(

Best Regards,

Hi Diamond,

If there is no lock, 927 will not get any reply. 

Are you using TI EVM or your own board? We should look into why there is no lock first. 

Would you be able to provide schematic if you have your own board?

Best Regards,

Charley Cai

Hi Charley Cai

Thank you very much for your reply.I am on a business trip these days, sorry for not replying to your message in time.I'm using my own board, but the schematic won't be available until next week.

Best Regards,

Attached is the schematic diagram of part 927TD-927-TEST-V1.1.pdf

Hi Diamond,

I would need some more information to debug no lock issues since this could related to many system level issues.

The schematic doesn't have values for all the components, so I would like you to verify that the resistor and cap values are following the datasheet. 

Please verify the 924 side is following the datasheet as well and make sure the connector pinout mapping is correct. 

What cable are you using to link 927 and 924? 

Could you check 927 register 0x0C[0]? if this bit is 0, likely there are issue with cable or connection. 

If possible, please provide register dump for both 927 and 924.

Best Regards,

Charley Cai

Hi Charley Cai

I work in software. The schematic diagram provided by our hardware colleagues.

It is designed by referring to the schematic diagram of the manual.And our circuit on the 924 side is in good condition for other projects,

so the communication problem should be on the 927 side.

From tomorrow, I will have a holiday of about 15 days, so register reading of 927 and 924 cannot be provided for the time being.

I have some basic questions to answer, does register 0x0C[0] on the 927 side need to provide a specific pixel clock?

If there is a problem with the pixel clock, will it cause the lock to fail?

Can I test the quality of the cable separately without providing the video signal?

I use the FPD LINK cable, and there is no problem for me to use this cable in other places.My line is only 20 centimeters.

Best Regards,

927 register 0x0C[0] doesn't need a specific PCLK. it will detect the back channel data coming from the 924 side which can be run on internal oscillators. 

The picture attached is showing UR907 and UR906. Was this done by mistake?

If you know the cable product number, we can check for it's spec. Is the same cable in above picture used?

Best Regards,

Charley Cai