DP83867IS: Power Up/Down Considerations...

Hi Darren,

Can you clarify what is meant by "diverge" and "flip?" From Section 10, Figure 34, and Table 136 in the datasheet, as long as VDDA1P8 is stable within 25ms of VDDA2P5 ramping, there should be no issues.

Thank you,

Nikhil

Hi Nikhil,

By diverge, I mean:

If you shutdown the power rails at the same time, but the supplies have different ramp-down times, you end up with a gradually increasing voltage difference between the rails (as shown in the above image as "diverge"). In such a case, would this "increasing" voltage difference between the rails ever cause an issue for the DP83867IS?

By flip, I mean:

If you shutdown the power rails at the same time, but the higher voltage rail has a steeper ramp than a lower voltage rail, then (as shown in the above image) the higher voltage rail could end up at a lower voltage than a rail that was supposed to be at a lower voltage. IE: in the image, see how the blue 1.0V rail starts lower than the 2.5V rail, but during ramp down, there is a time where it has a "higher voltage" than the steeply ramped down 2.5V rail?

In summary...

I know that for three-power mode, there is a diode between the 2.5V and 1.8V rails, which (to keep current from flowing through the diode and into the system) you need to keep reverse-biased. This means that for three-power mode, "voltage flipping" of the 2.5V and 1.8V can cause current to flow into the system and may cause issues.

But for the two-power mode, are there any internal diodes or ways for current to flow between the 2.5V, 1.0V and I/O rails? 

The datasheet does say that for two-power mode there is no specific order for which power supply is powered first, but is there no specification on these timings whatsoever?

Sorry if this is a little long...but hopefully it gets my concern across.

Regards,

Darren