Is the 949/948 SerDes pair compatible with Power over Coax? There is no mention of it in either datasheet that I can find. Any special precautions needed?
This thread has been locked.
If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.
Is the 949/948 SerDes pair compatible with Power over Coax? There is no mention of it in either datasheet that I can find. Any special precautions needed?
Hello Alex,
Typically PoC is not implemented with these devices but technically it could be supported much like our camera devices 953/954/960 for example. However most applications for 949/948 are for driving a display screen which draws much more power than would be practical to send over PoC due to backlight, timing controller, etc. What is the power requirement for your design?
Best Regards,
Casey
Hello Alex,
For 1W it should be feasible to implement PoC between 949 and 948. Are you planning for a dual FPD-Link design or single FPD-Link? What is the PCLK rate which you are planning for and what back channel speed?
Best Regards,
Casey
Hi Casey,
I'm planning to implement the dual link... would I then split the DC power across the two links? PLCK is ~ 150 MHz, and I was originally planning to use the 5 Mbps back-channel, but could use the 20 Mbps if it makes DC isolation easier.
Best,
Alex
Hello Alex,
I would not recommend trying to split the power across 2 links as it may introduce crosstalk. Instead I think it could be sent over one channel only and either 5Mbps or 20Mbps should be ok so long as the PoC network is designed to support high impedance in a frequency range of ~2.5MHz to 1.5GHz.
We have networks which can meet this requirement but they have not been explicitly validated using these specific device by TI before. If you would like I can share one of those potential solutions via E2E private message. What you could do is build a test platform for this solution and use the Margin Analysis Program, plus BIST functionality to validate the link performance running at speed with PoC applied to build confidence:
https://www.ti.com/lit/ug/snlu243/snlu243.pdf
http://www.ti.com/lit/pdf/snla301
Best Regards,
Casey