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Original question:

DS90UB948-Q1: DS90UB948 Test Pattern Generation（internal clock）

DS90UB948-Q1: Register 0x41 setting side effect

Kami Huang60
Genius 3830 points

Part Number: DS90UB948-Q1

Dear Sir/Ms.

My client 947 <->948 hit ESD. The test method of ESD is that ESD hits the ground near connection wire, not the machine itself. Found that the screen will flicker, presumably Lock is off. We refer to this discussion below, and modify the register 0x41 to find a substantial improvement.


Originally, ESD 10KV 100% will fliker, after modifying the 948 register 0x41 to 0x1F about 10% of 10KV will have a chance to fliker, 15KV about 30% will fliker.

Customers want to know, what other registers can reduce the chance of flicker?
Is there any serious problem in adjusting this register? Is there any Side effect?

Best Regards,

Kami Huang

  • 0
    TI__Genius 12866 points

    Hi Kami,

    When register 0x41 is enabled and set to a threshold value, the link will only drop if the error threshold value is reached. 

    If 0x41 is not set, the link will drop when a single error is detected. 

    Are you doing air gap discharge?

    Best Regards,

    Charley Cai

  • 0 in reply to Charley Cai
    TI__Genius 12190 points

    Hi Charley,

    Yes, they are doing air gap discharge. 

    May have more information :

    1. the error you mentioned above, are you talking about bit errors ? or what is it ? 

    2. Is there any potential problem to set register 0x41 threshold to its maxim value ?   

    Thanks!

  • 0 in reply to PYTsai
    TI__Genius 12866 points

    Hi PY,

    1. Yes, this is bit error in the clk0, clk1 and DCA bits as described in the datasheet. 

    2. If you do not set register 0x41, each bit error in clk0, clk1 and DCA bits will cause loss of lock while will results in losing video content. If you set 0x41, a few errors may get through which may result in display error or flickers. Whether this is a problem or not will depends on the use case.

    Best Regards,

    Charley Cai