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TPS65987D: Trying to understand if the external EEPROM is required and if defaults will work.

Part Number: TPS65987D

I am developing a Type-C battery powered device that can be either a power source (Charger) or be recharged from an external charger.  I want a simple 5V 3Amp advertisement for sourcing and sinking capability.  I hav ethe TPS65987DDH configured with PP_HV2 as the input from my 5V power supply to supply the VBUS voltage and PP_HV1 supplying power back to my system when an external charger is applied.  Does the device come programmed with a load that will support this?  Is the external EEPROM shownin the EVM design required?  Is there someone that can review and provide comments on the Interface design?

Thanks.

  • Hi Dan,

    For your first two questions:
    1. The device only comes with internal FETs that allow the power to be switched on or off
    2. The external EEPROM is required to load our patch. Any device improvements are released with a FW patch version that gets installed with a GUI. The device loads this patch during boot.


    For the review, we can have a hardware expert look into it.

    Regards,
    Kedar

  • Thanks for the prompt reply.  I was aware that the device only included the FET switches to control the connection to VBUS.  I have an external Boost converter to receive power from the device (PP_HV1) when it is acting as a sink and a Buck converter provides the power (PP_HV2) when it is acting as a source.  In regard to the EEPROM, is the intent that the EEPROM is loaded with the latest version of your patch when we manufacture the device and that is the code it stays with or is there an expectation (and a method) to update the patch code over time?

    Does the I2C ~IRQ go active when a change of state on the interface occurs?  I am curious what the indication is when a cable is plugged in or removed and whether it is detected as a UFP or DFP device so we know how to configure our system.  Will it automatically select the appropriate HV1 or HV2 pin?  

    You mentioned updating through the GUI.  I see that the EVM (PSIL060A) has I2C2 port connected to an external USB/FTDI interface.  Is this the GUI connection?  I currnetly did not connect I2C2, but if it is needed, I can easily add it.

    How can I send the design to for a review?

    Thanks.

  • Hello Dan,

    Regarding your question on the patch, yes, there is a method over I2C to update the patch. The device requires some FLxx commands (Flad, FLem, FLrr, etc.) commands that allow loading a FW patch on to your SPI memory device. New patches are released as and how improvements are made to the product.

    The I2C IRQ line needs to be configured. It is always active low, and can be configured for I2C1 and I2C2. Please refer to the Host Interface document for details on registers 0x16 and 0x17. 

    The HV1 vs HV2 pins are selected based on your configuration in register 0x27. Again the Host Interface Document should help you here.

    The GUI option requires an adapter that can access your SPI memory directly. You will need to have the SPI lines exposed to be able to connect to the adapter.
    This option is easier and faster, but not meant for field updates. The FLxx commands are specifically meant for updating without an adapter.

    Let me get back regarding the file sharing question you had.

    Regards,
    Kedar

  • Kedar,

    Thanks again for your response.  I will add a header to provide access to the SPI signal.  And it sound like I do not need to support the second I2C interface.  I thought that it was the GUI access to the FLASH. 

    We are planning to order an EVM to help get familiar with the device and it's configurations and such.

    I look forward to your info to send the file for review.

    Sincerely,

    Dan Barbour

  • Hi Dan,

    I sent you a personal message with my contact details. Did you receive it?

    Regards,
    Kedar

  • Hi Dan,

    I reviewed your schematic. For your requirement, an EEPROM can be omitted if you have ADCIN settings as one of what's listed under "Device Default Configurations" in the datasheet.

    As per your use case, Default Configuration #4 would be suitable.

    Is there anything else that you would want to know?

    Regards,
    Kedar

  • Thank you for reviewing the schematic and for your feedback.Your comment referenced Configuration #4, which indicates External Switch.  We are using the internal switches to control the Source and Sink connections for VBUS.  I was initially planning to use Configuration #2 so it would boot up to a safe state.  Am I understanding the use of the phrase "External Switch" correctly; meaning using that the FETS that are internal to the IC and connecting VBUS 1 and VBUS2 to PP_HV1 and PP_HV2 are NOT being used?  Or is something different.  

    Thanks.

  • Hi Dan,

    My apologies, I missed that detail. Your understanding is correct. So, for your use case, you would need to push a patch bundle using I2C.

    This does not need an EEPROM. You can create your specific configuration in the GUI, save the binary and then push it using your MCU (I believe connected to I2C1) using the PTCx commands.

    The commands are described in the host interface document.

    Regards,
    Kedar