DP83822I: Setting for the register

Hi Nagata,

Are these bits that you are reading causing issues on your device? What is the core problem of the register settings you are reading? I'd like to understand what the purpose of this is based on your finding before I can explain these bits. 

Thanks,

Cecilia

Hi Cecilia,

I will answer on behalf of Mr. Nagata.
There is no problem in operation, but since it may be different from the value assumed here, I would like to confirm why it has changed or has changed.

Thanks,

Fukuda

Hi Fukuda,

If there is no problem in operation and the device is working as expected I would think that you do not need to worry about the certain registers unless you know that it is directly impacting the performance. 

If you are still wondering about the registers I will be happy to reach out to our internal team to gather these items for you. 

Thank you,

Cecilia

Hi Cecilia,

Hi Fukuda,

Thank you for the feedback. I will see if I can share the details of the registers from your list.

Thanks,

Cecilia

Hello all,

Thank you for your patience. Here are my comments below:

Thanks,

Cecilia

Hi Fukuda,

Thank you for sharing the registers, let me review your configuration and your questions above and provide feedback by EOD Wednesday.

Thanks,

Cecilia

Hi Cecilia,

Hi Fukuda,

This could be a datasheet typo however by default I would expect EEE_EN would be disabled. Let me confirm with our validation  team just to ensure that you are seeing the expected value.

Just to confirm, for RX_D1 you have kept this strap open to keep it as Mode 1 correct? 

Thanks,

Cecilia

Hi Cecilia,

Cecilia,

Fukuda -san doesn't point the default value information of 0x04D1 register in datasheet.

Let me summarize the currently status which he pointed in this forum.

- He set  MODE 1 with RX_D1 (bootstrap). This mean is EEE_EN and PHYAD2 are disabled.
- As he read 0x04D1 register from silicon, read value of bit-0 (EEE Capabilities Enable) is '1'.

Q1) Are EEE_EN in bootstrap and EEE Capabilities Enable in 0x04D1 same meaning? e.g. If EEE_EN is '0', will EEE Capabilities Enable bit always be '0'?

Q2) If Q1 is yes, Do you have reason why this mismatching among RX_D1 and 0x04D1-bit0 happened? Is there another register / bit setting to set EEE Capabilities Enable ?

Regards,
Nagata.

Hi Nagata,

Thank you for clarifying the messages. I understand that your straps on RX_D1 are configured to Mode 1 as it is read properly on register 0x0467 meaning it should be strapped as EEE disable. However, you are seeing that for reg 0x04D1 it is contradictory saying that it is still reading as EEE capable. 

I would expect 0x04D1 bit 0 to also read 0 as it would mean that it is disabled. I will need to review in our labs to confirm the setup and configuration.

Can you please read back registers 0x703C and 0x703D for me? I would like to see what values are showing as the bits for the EEE advertisement.

Thanks,

Cecilia

Cecilia,

For reading 0x703C and 0x703D registers, the procedure are

Reading the value of register 0x703C/0x703D:

1. reg<0x000D>=0x001F (write)

2. reg<0x000E>=0x703C/0x703D  (write)

3. reg<0x000D>=0x401F  (write)

4. reg<0x000E>      (read)

Is it correct?

Regards,
Nagata.

Hi Cecilia,

Hi Fukuda,

Apologies on the delay there was an error on the message reply and it looks like it did not go through on Friday.

If 703C and 703D are confirmed as Energy Efficient Ethernet are not advertised then you are correct EEE is not valid and there could be a typo on the default reading for reg 0x4D1. 

Thanks,

Cecilia

Hi Cecilia,

Let me confirm just in case.

If EEE is set not to be advertised (0x703C bit1 is 0), I think that 0x04D1 bit0 is OK for both, is that correct?

Since 0x04D1 bit0 of the own node is 1, the situation is that there is EEE capability, but is it true that the EEE of the own node is enabled when an EEE advertisement is received from the opposite node?

Thanks,

Fukuda

Hi Fukuda,

That is a good question. I will have to confirm with our design team for this however I do not think EEE should be enabled if through register 0x703c it states that it is not being advertised. 

Again I will have to confirm and let me provide feedback in 1 - 2 days.

Thanks,

Cecilia

Hi Cecilia,

I have three questions.

1. Is the Default value of 0x04D1 1 instead of 0? Is it a typo?

2. EEE_EN is set to 0, but it is understood that it is not linked with 0x04D1 Is it correct?

3. Some of them are mass-produced with the current register settings.
　Is there any problem with shipping as it is?

Thanks,

Fukuda

Hi Fukuda,

The EEE_EN strap will control bit 1 of 0x703C and the default value of 0x4D1 bit 1 will be 1. Yes that is a typo. We are currently making these changes to update the datasheet accordingly.

I am confirming with our team on the register settings and will let you know if this is ok.

Thanks,

Cecilia

Hi Fukuda

I received some feedback from my team: 

1. Is the Default value of 0x04D1 1 instead of 0? Is it a typo?

Yes, default value of 0x4D1[0] is 1’b1.

2. EEE_EN is set to 0, but it is understood that it is not linked with 0x04D1 Is it correct?

Yes, EEE_EN strap controls only abilities in MMD7_EEE_advertisement register.

3. Some of them are mass-produced with the current register settings.
　Is there any problem with shipping as it is?

Even though 0x4d1[1] is set as long as 0x703c is disabled, EEE ability won't advertise although an extra next page will still be transmitted during auto negotiation. 

Hi Cecilia,

The default value of bit1 of 0x703c is written as 1, but is it typo?

Fukuda

Hi Cecilia,

I'm sorry, I understand that 0x703c bit 1 is set to 0 by the strap.
*Table 132.0x703C MMD7 Energy Efficient Ethernet Advertisement Register (MMD7_EEE_ADVERTISEMENT)

Fukuda

Hi Cecilia,

I understand about 0x04D1 but I think that 0x04D1 bit0 should change together with EEE_EN.
I think other customers will have similar questions, so I would like you to recognize it as an issue.

By the way, since the following questions have not been answered, please answer.
1.0x000A-bit2: The data sheet says 1 by default. Is this a mistake?

2.0x000B-bit[3:0]: I read the link, but I didn't understand it. Are there any problems with EtherCAT? In conclusion please tell me which is more correct, 1011 or 1001.

3.0x0017-bit6: Please tell the confirmation result to the internal team.

4.0x001C-bit[10:00]: I understand that there is no problem with 0x05EE, but please check if there is a statement of 05FF in the data sheet.

Thanks

Fukuda

Hi Fukuda,

Yes as I mentioned I agreed with you that it is a typo and we will be updating in our datasheet accordingly. Thank you for letting us know that your goal was to share with future readers who may also have this confusion as well. 

I am confirm 1-4 with our design team again as to confirm if some of these are typos or expected default values.

Thanks for your patience I will share my answers once they provide their feedback.

Thanks,

Cecilia

Hi Fukuda,

Feedback for questions 1-4

1. Yes it is a typo that our team has caught which we will be revising. It should be 0 after reset

2. No recommendations should be dependent on what mode is preferred for FLD

3. Yes you are correct it is a typo the reset should be bit 1 normal operation

4. Correct, this is a typo. Register 0x1C bits[10:0] has a default value of 0x5FF and not 0x5EE.

These have already been highlighted recently and should be fixed for the next datasheet refresh.

Thanks,

Cecilia