TMDS181: Why can't be output 4K@60 video ?

Hi,

1. Please change the pull-up resistor on SDA_SNK and SCL_SNK from 1.5k to 2k

2. Please remove the pull-up resistor on OE pin and have 200nF pull-down cap

Can you implement the DDC snoop option and see if the 4K@60Hz work? If not, can you then toggle the HPD_SNK to see if the 4k@60Hz work?

Thanks

David

Hi David

      1. I had try 1.5k to 2k resistor, but can not 4K@60Hz work.

      2. Alson can not work

      Change DDC snoop and HPD_SNK,it can not work.

Hi, 

Can you please dump out both Page 0 and Page 1 of the TMDS181 registers?

The Page 0 registers are the registers in the TMDS181 datasheet. To access Page 1, please write 0x01 to register 0xFFh first, and then dump from registers 0x00h to 0xB1h.

Thanks

David

list the registers，check out please

Thanks

page0:
54
4D
44
53
31
38
31
20
01
02
B1
00
00
00
00
0F
00
00
00
00
00
00
00
B0
00
02
03
01
00
00
42
06
4A
00
00
00
00
00
00
00
00


page1:
02
00
3F
00
A0
00
00
00
04
00
00
33
00
00
11
00
F0
00
00
07
00
00
00
00
00
00
00
00
00
00
00
00
00
00
00
00
00
00
00
00
00

HI,

Looking at the register Page 0 register 0x0B, bit [4:3] TX_TERM_CTL needs to be set to 0x11 for HDMI2.0 when TMDS181 I2C_EN = 1. 

Does the source and the sink support HDMI2.0? The TMDS_CLOCK_RATIO_STATUS needs to be 1 for HDMI2.0 based on the DDC bus snooping and I still this bit being set to 0.

Thanks

David

I tried to set bit [4:3] TX_TERM_CTL = 00 、01 、11，it still Failed

Inaddition,when I2C_EN=0,It also can't be output 4K 60

change 0x0B to "TMDS Clock is 1/40 of TMDS bit period" 

the HDMI_CLK frequence change to 37.5M (Normal 148.5M)

the source and the sink support HDMI2.0

Hi,

Are you changing the source from HDMI1.4 to 2.0 without unplugging the HDMI cable? If this is the case, can you try to toggle PD_EN and see if HDMI2.0 can work?

If the PD_EN does not work, can you force the TMDS181 into the retimer mode by writing 0x11 to Register 0x0A bit [1:0]? 

Thanks

David