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DP83867IR: Loopback mode setting - LOOPCR register

Part Number: DP83867IR

Hi,

We are working on the DP83867 Ethernet PHY chip loopback testing.

As per the datasheet it was mentioned that LOOPCR register need to be set to value 0xE720  for Lopback to work.

After setting this register we need to immediately perform software restart using 0x00FE register 14 bit. 

By default this register should hold the value 0xE721.

But when we read this register we are getting value as 2 and when we set its value to 0XE720, even after software 

restart we are not able to set any other register for Loopback testing. All register will remain 0 only.

As per the comment given in the below E2E forum discussion page, Loopback test works only after setting the LOOPCR

register. Please check the link below:

https://e2e.ti.com/support/interface/f/138/t/684210

Waiting for your reply,

Thanks,

Vipul

  • Hi Vipul,

    Can you please clarify what your question is? When configuring the PHY to 0xE720 you are not able to perform loopback but when you follow the steps in the link above you see the loopback working correcly? Is that the correct interpretation? 

    Thanks,

    Cecilia

  • Hi Cecilia,

    I just wanted to know the role of LOOPCR register in the LOOPBACK Testing?

    Is it mandatory to set LOOPCR register to value 0xE720 for Loopback functionality to work?

    If yes please describe the steps.

  • Hi Vipul

    As I mentioned in the previous E2E thread I will need to reach out to our internal team to confirm these configurations. 

    Thanks,

    Cecilia

  • Hi Cecilia,

    We are waiting for your reply 

    Regards,,

    Vipul

  • Hi Vipul

    I still am debugging this in the lab.

    What I did find is that I read back LOOPCR reg 0x00FE and see that default it is 0xE721 and when I write 0xE720 to it I do not see the 0x0002 value that you are seeing. 

    I am also still able to read and write to other registers too and do not see the 0.

    I can provide you more details once I gather more information in lab and with my team.

    Thanks,

    Cecilia

  • Hi Cecilia,

    Actually after power on default value we are reading as 0x0002 instead of 0XE721.

    After that we set this LOOPCR register value to 0XE720 but it affects the other registers as well.

    Means after setting the LOOPCR register we are not able to set other register value.

    For MII Loopback:

    1) Write register 0x001F to 0x8000 to apply a software reset.

    2) Read LOOPCR register 0x00FE - (Value read here is 0x0002)

    3) Write LOOPCR register 0x00FE to 0xE720

    4) Write register 0x0000 to 0x2100 to disable Autonegotiation, 100Mbps and Full duplex.

    5) Write register 0x0032 to 0x00D3 to enable RGMII

    6) Write register 0x0000 to 0x6100 to enable digital loopback.

    7) Write register 0x001F to 0x4000 to apply a software restart.

    8) Value after reading all register back :

    0x0000 - 0x00

    0x0032 - 0x00

    0x001F - 0x00

    Let me know your thoughts on the same.

    Thanks,

    Vipul

  • Hi Vipul

    I am still investigating with our design team on the LOOPCR being necessary to write

    However, on your steps as I mention everything looks to be correct except #2 when I read 0xFE I read the default 0xE721 and am able to write 0xE720 with no issues. 

    My apologies if you have mentioned this before but does this phenomenon where you read back all 0s only occure when you write to 0xFE or does it happen when you read other values? Does this occur if you write to register 0xFE later in the steps IE write to 0xFE = 0xE720 after step 5 instead? 

    Thanks

    Cecilia

  • Hi Cecilia,

    1) After writing the 0x00FE register to value 0xE720 , we are reading all register as zero. If we do not set the LOOPCR register all register will have the correct value which was set.

    2) Even after setting the 0x00FE register at step 5 we are reading all register as 0 only.

    Thanks,

    Vipul

  • Hi Vipul,

    Can you confirm again if this is the 64pin or 48pin device? Also is the MDIO and MDC connected to a bus with other devices accessing the SMI? It is still confusing to me why only after you configure Reg 0xFE that all other registers would read 0x0 after.