DS90UB940N-Q1: The LOCK pin cannot be pulled down when DS90UB940 is performing a hot-plug experiment

Hello,

Are you setting register settings in 0x68 on the 940N? If 0x68[3] = 1, then LOCK will stay high all the time even if the serializer is disconnected

Best Regards,

Casey 

Thank you very much for your reply！

I checked the data sheet of the 940N,The description of the 0x68 register is as follows:

7.6.1.61 PGDBG Register (Address = 68h) [reset = 0h]

Table 72. PGDBG Register Field Descriptions 

The introduction of bit3 seems to be about PGDBG, is it related to the LOCK state?

By the way, the current 940N register configuration list:

0x02,0XD0;

0x03,0xEA;

0x07,0x00;

0x22,0x98;

0x26,0x1E;

0x27,0x24;

0x28,0x81;

0x34,0x11;

0x57,0x02;

0x6A,0x22;

0x6B,0x50;

that's all

Can you help to check that the settings of the above registers will affect the state of the LOCK pin? Thank you

It sounds you set many registers in 940N side, some are out of the auto-load between ser. and 940N side. May I know why you set in this way?

from the reg. it doesn't impact the LOCK indication. so to make us know more clearly some questions:

1. what is the ACC off? and what is the 940 output signal when ACC off? can you capture the detailed message for it?

2. can you plug off the cable and check if LOCK indication in 940N is off?

regarsd,

Steven

1: Since the video format on the ser side is known, the connection with the deser is also known. In addition, the ser device and the deser device are from two different suppliers, in order to minimize the problems caused by the interaction between the ser and the deser , So the auto load channel is closed

（由于ser侧视频格式已知，与deser的连接方式也是已知的，另外ser端设备与deser端设备分别为两个不同供货商，为了尽量减少ser与deser之间交互带来的问题，所以关闭了auto load通道）

2: The ser end is an AVM device. After the ACC is off, the entire AVM device will be powered off and then stop sending video signals. After the AVM stops sending the video signal, the lock on the 940 side is still high, and the CSI clock is in high speed mode at this time, and the clock frequency keeps changing until the AVM is powered on again to send the video signal, and the 940 CSI clock is stable again.

（ser端是AVM设备，ACC off后AVM整个设备会断电，然后停止发送视频信号。AVM停止发送视频信号后，940侧lock依然为高，而且此时CSI clock为high speed mode，clock频率一直在变化，直到AVM再次上电送出视频信号，940 CSI clock才再次稳定下来。）

Add：

The lock pin is still high after unpluggingDS90UB940 LOCK not pull down（To TI forum）0910.xlsx the wiring harness, read 0x1C bit0=1 (De-Serializer locked to recovered clock). The Ser end uses DS90UB921.

拔掉线束后lock pin脚依然为高，读0x1C bit0=1（De-Serializer locked to recovered clock）。Ser端用的是DS90UB921。

We don't see this issue in our EVM test. could you check if the 940 FPD-Link input channel has noise?

also, how many boards have this issue?

regards,

Steven

Thank you for the confirmation result

Is your configuration on the development board consistent with ours?（您在EVM板上的配置是否与我们的一致？）

0x02,0XD0;

0x03,0xEA;

0x07,0x00;

0x22,0x98;

0x26,0x1E;

0x27,0x24;

0x28,0x81;

0x34,0x11;

0x57,0x02;

0x6A,0x22;

0x6B,0x50;

Or, can you send me the register configuration of your current settings, and I will check it again?（或者，能否把您目前的设置的寄存器配置发给我，我再去确认一下？）

十分感谢您的支持，谢谢

Yes, I try your setting as well.

you also can try more tests with different settings in your board.

regarsd,

Steven