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DS90UB941AS-Q1: DS90UB941AS-Q1

Part Number: DS90UB941AS-Q1
Other Parts Discussed in Thread: ALP

Hello.

We have ds90ub941as serializer and two ds90ub926 (0x76 channel0 and 0x58 channel1 i2c addresses) deserializers. FPDLink works well. And when I try to access to 926 deserializers by i2c through fpdlink from 941 serializer I have a problem. I can access only to deserializer connected to channel 0. When I write to 0x1E (941AS) register bit PORT1_SEL, DES_ID (0x06 UB941AS register) changes to 0x58 (i2c deserializer address connected to port 1) but I can still read from serializer connected to channel 0 (0x76). BRIDGE_CFG2 of UB941 set to 0x80 LEFT_RIGHT_3D. When I change connection 0x58 to channel 0 and 0x76 to channel 1 I can connect to 0x58 address only. UB941AS has 0x18 address which I have access too. In ALP utility sometimes in system topology appears channel 1 address and I can write to its registers.

  • Hello Yuri,

    Can you please send over all the programming steps you are using to configure this setup so that we can review?

    Best Regards,

    Casey 

  • Hello Casey,

    At UB941 (address 0x18) I write:

    1. Register 0x01 (RESET_CTRL) - value 0x00

    Bit 2 DSI_RESET - 0

    Bit 3 DISABLE_DSI - 0 

    2. Register 0x03 (GENERAL_CFG) - value 0x9A

    Bit 1 PCLK_AUTO - 1

    Bit 3 I2C_PASS_THROUGH - 1

    Bit 4 FILTER_ENABLE - 1

    Bit 7 RX_CRC_CHECKER_ENABLE - 1

    3. Register 0x17 (I2C_CONTROL) - value 0x9E

    Bit 7 I2C_PASS_ALL - 1

    4. Register 0x1E (TX_PORT_SEL) value 0x01 or 0x02

    Bit 0 PORT0_SEL - 1 or Bit 1 PORT1_SEL

    5. Register 0x32 (IMG_LINE_SIZE0) value 0x80

    6. Register 0x33 (IMG_LINE_SIZE1) value 0x07

    At remote deserialiser UB926 (address 0x76 channel 0)

    1. Register 0x02 (General configuration 0) value 0xD0

    Bit 4 OUTPUT_SLEEP_STATE_SELECT - 1

    Bit 6 OUTPUT ENABLE STRAP OPTION OVER WRITE - 1

    Bit 7 OUTPUT ENABLE - 1

    At remote deserialiser UB926 (address 0x58 channel 0)

    1. Register 0x02 (General configuration 0) value 0xD0

    Bit 4 OUTPUT_SLEEP_STATE_SELECT - 1

    Bit 6 OUTPUT ENABLE STRAP OPTION OVER WRITE - 1

    Bit 7 OUTPUT ENABLE - 1

    With this config  I can access to remote deserialiser registers channel 0 only (UB941 0x1E register value 0x01). When I write to UB941 0x1E register value 0x02 I can still access to channel 0 deserialiser. When I configure channel 0 deserialiser and swap channel 0 and 1 serialisers physical connection I configure other serialiser (so it connected to channel 0 now) and they both works well and I see the picture from both. But I can access to channel 0 deserialiser only. 

  • Hello Yuri,

    0x03[3] is a port specific bit, so it looks like you are only enabling I2C pass through for port 0. Please try the following steps:

    0x1E = 0x01

    0x03 = 0x9A

    0x1E = 0x02

    0x03 = 0x9A

    Best Regards,

    Casey 

  • Hello Casey,

    I have written next registers

    0x1E = 0x01

    0x03 = 0x9A

    0x1E = 0x02

    0x03 = 0x9A

    but I can only access to channel 0 deserialiser even if I write 1E = 0x02 I still continue to read from channel 0 deserializer...

    below dump of ub941

  • Hi Yuri,

    Can you try the following script?

    WriteI2C (0x1E,0x01) //Select FPD-Link III Port 0
    WriteI2C (0x1E,0x04) //Use I2D ID+1 for FPD-Link III Port 1 register access
    WriteI2C (0x1E,0x01) //Select FPD-Link III Port 0
    WriteI2C (0x03,0x9A) //Enable I2C_PASSTHROUGH, FPD-Link III Port 0
    WriteI2C (0x1E,0x02) //Select FPD-Link III Port 1
    WriteI2C (0x03,0x9A) //Enable I2C_PASSTHROUGH, FPD-Link III Port 1

    and then try to write to register 0x58 on port 0 and 0x78 for port 1.

    Regards,

    Michael W.

  • Hi Michael.

    I tried the script you written, but port 1 is still unacceptable. But when after your script I write to 0x1E 0x06. Everything begins working. All channels are acceptable; all slave devices are acceptable by its aliases. I think PORT1_I2C_BIT must be set regardless PORT0_SEL or PORT1_SEL bits is set to accept PORT1 i2c bus.