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Original question:

TL16C2550: TL16C2550 reset behavior

TL16C2550: TL16C2550 reset behavior

Dai
Intellectual 270 points
Part Number: TL16C2550
Hi Bobby,

I tried to confirm below.
The result was "D0-D7" buses states are not Hi-Z in initial reset condition.

Tried with TL16C2550RHB package

- D0-D7:Open
- RXA/RXB : Connected to GND directry.
- TXA/TXB : Open
- #CSA/#CSB: Pulled 3.3V via 10k ohm.
- Xtal:4MHz ceralock
- #IOW:Pulled up 3.3V via 10k ohm.
- #IOR:Connected to GND directry.
- #RTSA/RTSB: Open
- #CSTA/CSTB: Pulled H3.3V via 10k ohm.
- A0/A1/A2:Connected to GND directry.
- INTA/INTB: Open
- Reset: pulled H 3.3V via 10 k ohm



After set above circuit, I turned the power on.
(Appry 3.3V)

Then D0-7 states are not Hi-Z but Output.
After once set Reset port to L and return to H,
D0-7 states changed Hi-Z.
This result is different with your explanation.
What is the difference between your environment?
  • 0
    TI__Guru 73541 points

    Hi Dai,

    I'll try doing this set up again tomorrow to see if I get the same result as you. I think during my test I may have had IOR pulled HIGH though.

    -Bobby

  • 0 in reply to BOBBY
    Intellectual 270 points
    Any progress?
  • 0 in reply to Dai
    TI__Guru 73541 points

    Hey Andre,

    Sorry, I've been a bit loaded... We've recently picked up a new hire who I will be working with to help double check this for you.

    I'll target for a follow up response end of next week.

    -Bobby

  • 0 in reply to Dai
    TI__Mastermind 26806 points

    Dai,

    I'm the new hire, nice to meet you.

    I ran a series of tests using the device and your conditions. The results agree with your observations. Regardless of the input to IOR or the startup condition of RESET, the RESET pin must be cycled in order to get the Dx pins into a High-Z state. Specifically, my observations were:

    Upon power-on using exactly the conditions you described, the output pins Dx were pulling low (behaving as outputs). This immediately ceased and the pins became High-Z when the pull-up of RESET was disconnected (and when GND was connected).

    Furthermore, I tried powering-on the device with RESET pulled to GND rather than VCC, and I observed the same behavior: the output pins Dx were pulling low (behaving as outputs), but immediately ceased doing so and became High-Z when the connection of RESET to GND was disconnected (and when pull-up to VCC was connected).

    Additionally, this was observed with IOR pulled high and low.

    The ramification of this observation is that, in design, it would be best practice to provide a pulse to RESET to the device after startup to ensure the Dx pins are set to a High-Z state.

    Best,

    Danny

  • 0 in reply to Danny Bacic
    Intellectual 270 points
    Hi Danny,

    Thank you for checking.I relieved to hear it.

    I will use this IC with reset pulse.

    I hope TI updates the datasheet about this behevior.
    Because it is difficult to recognize it from current datasheet.
    If you can, please request it to PIC in TI.

    Thank you again.
    Dai