DS90UB949-Q1: Ser/Des DS90UB949-Q1 and DS90UB948-Q1 BIST and PASS pin

Tomislav Rac said:

Part Number: DS90UB949-Q1

We are using the DS90UB949-Q1 and DS90UB948-Q1 ser/des pair to drive some displays in our IVI device. We are using BIST function on the DS90UB948-Q1 deserializer to check the FPD-Link quality and status during the device operation. 

Result of BIST is on PASS pin so I want to read BIST PASS signal on deserializer pin 7 with oscilloscope.

PASS pin is shared with GPIO0 and SDOUT so I'm not completely sure that I read exactly PASS signal, and not GPIO0 value or SDOUT value.

What I did?

1. First I set BIST_CONTROL(0x24) register on deserializer with value :

BIST_EN : 0
BIST_CLOCK_SOURCE : 01
BIST_PIN_CONFIG : 1 (I want to start BIST with BISTEN pin )
AUTO_OSC_FREQ : 1
BIST_OUT_MODE : 01

2. Then switch to port 0 and set GPIO0_CONFIG register to value:

GPIO0_DIR _D_GPIO0_DIR : 00 (Functional mode) - I expect to get PASS signal on pin 7
Rest of values in register are 0.

3. Then set D_GPIO0 (pin 19) to HIGH and D_GPIO[3:1] (pins 16, 17,

and 18) to LOW.

4. Set BISTEN pin to HIGH

5. Toggle 0x04[5] on the serializer. (MCU is on serializer side)

6. After 1 sec BISTEN pin is set to LOW

On the image below is what I captured.

Yellow signal is BISTEN pin and the purple one is signal on pin 7 on Deserializer.

I expect PASS signal on purple signal, but it's going LOW right after BISTEN is set to LOW and that is not what I expected.

Questions: Is the whole procedure right and how can I be sure that I read PASS signal?

If purple signal is PASS signal, why it's going LOW although there is no any LOW level in half-pixel clock period that means there is no error in BIST?

Also, after BISTEN is set to low, I’m trying to read some registers on Serializer and Deserializer via I2C. I managed to read serializer registers after that, but Deserializer and everything on I2C bus on DESER side Is not available. I don’t get ACK on I2C communication.

Thank you!

Best regards,

Tomislav

UPDATE:

I captured BISTEN pin and PASS pin again and I found out that there is a drop (aprox. 2,5ms in LOW) in pass pin on the beginning of test. That's why PASS pin is LOW at the end of BIST. I guess...

You can see the signals on the images below. The second image represent red rectangle on the first image.

Do you have any guesses as to why this is happening? 

Thanks!

Hi Tomislav,

Can you try to read register 0x25 on the 948 after BIST. Is the 948 still locked after the BIST?

Regards,

Michael W.

How you mean LOCKED after the BIST? 

I tried to read register 0x25 about 1 sec after BISTEN pin is pulled down to LOW and 948 is not available.

Here is I2C communication captured during selecting port before reading 0x25.

Deserializer doesn't acknowledge its slave address on the bus at all so I'm not able to communicate with 948.

Here is capture of setting BIST_CONTROL register before BIST was enabled via BISTEN pin.

Just an example of I2C communication with 948 before BIST.

Also if BIST is not started, 948 does its job normally and I2C communication works fine.

One more information...

Below it's a capture of BISTEN pin and LOCK pin.

I don't know if that means anything to you.

Best regards,

Tomislav

Hi Tomislav,

I mean after BIST is disabled is the LOCK of the 948 high? 

Can you give me a dump of the registers before you enable BIST on the 948 and the 949?

What is your BISTC on the 948 tied to? 

Regards,

Michael W.

Hi,

As you can see on the image in the last post LOCK pin on 948 is HIGH after BIST is disabled.

Dump of the registers on 948 and 949 just before BISTEN is set to HIGH is attached in zip file.

BISTC pin is not connected anywhere. We count on  weak internal pulldown.

2110.register_dump.zip

Best regards,

Tomislav

Hi Tomislav,

your BIST is set to use the external PCLK, are you applying a video source to the 949 when you are using BIST?

It looks like your BIST settings are correct.

Can you give me the same dump but after BIST is complete? (just the 949 if the 948 is not communicating)

After BIST when you are trying to access the 948's registers you are using the local I2C and not the FPD-link correct? 

Regards,

Michael W.

Hi Michael,

Yes, BISTC is pulled down so BIST is set to use the external PCLK, but in the moment of performing BIST there is no video source sending to the 949. Video will be sent a bit later. Is that root cause of the issue? We don't have a clock for performing BIST without sending video stream?

Dump of 949 registers after BIST is attached. 948 is not able to communicate.

SERIALIZER after BIST_dump.zip

After BIST I'm trying to communicate with 948 trough FPD-link(back-channel). Not using local I2C.
Serializer is connected locally to the MCU and with 948 I can communicate only via FPD-link.

Best regards,

Tomislav

Hi Tomislav,

Since your BIST clock source is the external PCLK, you do need video coming into the 949 to have a PCLK for BIST. Can you retry with the video going into the 949 during BIST?

Is the video reenabled after BIST is done?

Regards,

Michael W.

Hi Michael,

First, I repeated starting BIST before video is going into 949, but I change timing a little bit.

Now I managed to communicate with 948 after BIST is stopped but I caught a BIST errors in 948 and 949 registers:

• deserializer, reg 0x25 = 5u (sometimes 6u)
• serializer, reg  0x1B = 3u (sometimes 4u)

Here are the captured signal. On the second image is detail rounded red in the first one.

Every time PASS pin is going down just 250ms after BIST is started.

If I start BIST later when video stream is going to 949, I'm not able to communicate with 948 after BIST just like before.

Is there any moment/period when BIST cannot be performed or something like that? 

Hello Tomislav,

Do you pull the GPIOs as explained in the datasheet?

Are you following the steps exactly as described in the datasheet?

Hi Hamzeh,

Yes, I double checked with oscilloscope. Just before BISTEN is set to HIGH, the pins 16,17,18,19 are set as explained in the datasheet.

It is really weird. When BIST is done (BISTEN -> LOW), I try to read BIST errors from SER and DESER registers. BIST takes 1s.

• I am always able to communicate with 949 (SER is on MCU side, connected directly), but there are errors in reg 0x1B (SER) (sometimes value 3u, sometimes 4u...) 
• DESER 948 behaves inconsistent. I can communicate with 948 only trough back channel. Sometimes I managed to communicate with it and then I read value 6u or 5u from reg 0x25, but sometimes i'm not able to communicate at all. I don't get ACK on I2C bus.

I had already pasted captured signals.

Best regards,

Tomislav

Hi,

I captured three important signals during BIST.

Something is happening 250ms after BIST is enabled.

I was not able to read 948 after that. Reg 0x1B in 949 has value 3 on both ports.

Best ragrds,

Tomislav

Hello Tomislav,

this behavious is not expected. Have you tested another board?

I just tried this on our EVM and it works without any problem!!

Hi Hamzeh,

I tried with another board. The same thing happens.

Here is another capture. Maybe it can help you to understand what is happening.

As you can see on starting and stopping BIST, LOCK signal is not stable in HIGH. Is that normal behavioral?

Starting BIST(zoomed):

Stopping BIST (zoomed):

Best regards,

Tomislav

Hello Tomislav,

As I said, I have tested this on EVM but did not see similar behaviour!!

Can you send your schematic, I need to review it and see if there is anything wrong! Also reg dump before and after the BISt would be helpfull!

Hi Hamzeh,

I sent already dump of all register on 948 and 949 before and after BIST earlier in the thread, 

I was not able to make dump of 948 AFTER BIST because I can not communicate with 948 after BIST.

Please read the whole thread.

Schematic will be sent tomorrow.

EDITED:

Just to clarify, LOCK pin should always be HIGH from the moment the link is established?

It is not normal that it goes LOW in the moment when BIST is enabled and disabled, right?

Thanks!

Best regards,

Tomislav

Hi Tomislav,

Correct. The lock pin should be goes HIGH when there is a link established. If you want to get the register dump for the 948, you can simply tap on the 948 I2C and perform the register dump without power down. This will retain all the register setting.

Aaron

Hi,

I send you schematic of MCU+949 and 948 boards. Please check them and let me know if you find something wrong.

Aaron Heng said:

If you want to get the register dump for the 948, you can simply tap on the 948 I2C and perform the register dump without power down. This will retain all the register setting.

Tap on the 948 I2C??? Are you talking about some kind of application?

I sent you register dump of 948 and 949 before BIST and register dump of 949 after BIST. From some reason I'm not able to communicate with 948 trough I2C back-channel after BIST.

Please read the whole thread. I think the problem is that LOCK pin goes LOW in the moment BIST is enabled and disabled and I don't know why.

Thank you for your support so far.

Best regards,

Tomislav

Hi Tomislav,

I will review your schematic and reg dumps and give you an update on Wednesday.

Regards,

Michael W.

Hi Tomislav,

Why is the PASSpin connected to the GPIO2 pin? Can you retry your test but with R101 removed? Also during your testing, can you have the video going into the 949 be consistent. To change video frequency or video timing into the 949, the 949 should be reset.

Regards,

Michael W.

Hi Michael,

PASS pin is connected to GPIO2 pin because we want to read PASS status with MCU on serializer board.

Marcinkowski Bartosz quote:

Regarding PASS: The PASS pin cannot be read from the serializer side. It is only available for local on the deserializer side. The PASS pin toggles whenever there is an error where CRC error keep track of this. So, if you want, you can access to this via remote register from the serializer side. If you want to monitor the PASS pin from the serializer side, then you configure the serializer and deserializer device via back channel connecting the PASS pin to GPIOx.

But...on board I currently use R101 is removed.

During BIST video going into 949 is consistent . Video frequency and video timing is not changed.

I checked pins 16,17,18 and 19 again and they are set as is written in manual and also not changed during BIST.

Best regards,

Tomislav

Hi,

I already sent you similar waveforms, but I do it again.

This is what is happening during BIST. From some reason LOCK is not stable(not always HIGH) in the moment when BIST is enabled and disabled.

Moment of starting BIST(zoom):

Moment of disabling BIST(zoom):

Best regards,

Tomislav

Hi Tomislav,

The GPIO's cannot be sent across the link during BIST so connecting GPIO2 to the PASS pin will not allow you to read the PASS pins status from the serializer. 

It is expected behavior for the LOCK to be intermittent when switching to BIST and switching out of BIST.

Regards,

Michael W.

Hi Michael,

I know the GPIOs cannot be sent across the link during BIST. The idea was to check PASS pin after BIST is performed.

Regarding LOCK, a few posts earlier Hamzeh wrote that this was not the expected behavior.

OK...if LOCK signal behaves normally, I still have a problem with communication through back-channel after BIST is disabled (BISTEN goes LOW).

I'm not able to communicate with any device through back channel after BIST.

Also PASS signal on deserializer after BIST is LOW and there are errors in reg 0x1B on serializer indicating CRC errors during BIST.

Best ragrds,

Tomislav

Hi Tomislav,

Can you clear the CRC errors after BIST by writing 0xA0 to register 0x04 on the 949 and then write 0x80 to 0x04. Then wait a couple of seconds to see if you are still getting CRC errors. 

Can you access the local I2C on the 948 and read the registers after BIST?

Regards,

Michael W.

Hi Michael,

I'm not able to access local I2C on the 948. We should do a big rework on board to manage that.

I send you another registers dump:

• All registers on 948 and 949 on both ports selected just BEFORE BIST is started.
• All registers on 949 on both ports selected AFTER BIST is performed. I'm not able to communicate with 948 after BIST.

dump.zip

Could you please take a look on that? Maybe you can find something weird.

There are some difference between registers when port 0 and port 1 is selected on 948 registers. I understand why there is a difference on registers rounded black.

Can you explain why the blue rounded ones are not the same on both ports?

Thank you for support!

Best regards,

Tomislav

Hi,

I have looked at the register dumps that you have sent, but we still need the registers from the 948 after Bist is disables to debug this issue.

Regards,

Michael W.

Hi,

Let me to summarize everything.

What hardware settings we have? How we use BIST functionality and what issues we have?

Debugging this BIST issue takes us a lot of time and there is no progress in solving it. Please read the whole PDF. I hope it will be easier to debug it if everything is on one place.

BIST_issue.pdf

Do you really think that deserializer dump after BIST will help you to debug issue?

We can try to do that, but we must connect another MCU directly to I2C bus on deserializer side, to avoid transfer through back-channel. It will take some time, but if this will help us to debug these issues, we will try to do that.

Schematics was sent to Michael.

Thank you for your support!

Best regards,

Tomislav

Hi Tomislav,

Yes, I think the register dump from the DES after the BIST will be very useful. You could try soldering on wires onto the display's I2C and connect a USB2ANY and use Analog launch pad to get the register dumps for the 948.

Regards,

Michael W.

Hi Michael,

I managed to read register dump of 948 after BIST, connecting another MCU to local I2C bus on deserializer board. After BIST is disabled second MCU collects deserializer register dump and that is all what it does.

Since I'm not able to collect 948 register dump with main MCU after BIST and locally I can, the problem is obviously in the back channel... Maybe some configuration flaw?

register dump - 30_11_2020.zip

Also I added DES ID and REMOTE_SLAVE address to serializer registers. That is the only difference from the last register dump.

Please check new register dumps above and PDF with HW&SW explanation I sent you last week.

PS...

I found this topic reading forum:

It seams to be related to my issue, also CRC error are generated during BIST.

Do you know how this is solved and do you think EAQ setting is disrupted in my case?

I hope we will solve this issue soon. 

Thank you very much for support!

Best regards,

Tomislav

Hi Tomislav,

Your EQ values are different between before BIST and after BIST. It is a possibility this is the issue. is the video working after BIST is disabled? 

Regards,

Michael W.

Hi Michael,

Yes, video is working after BIST is disabled. It seams forward channel works fine after BIST.

Back channel has some issues. That's how it looks like.

Best regards,

Tomislav

Hi Tomislav,

Can you try to write to a register after BIST where the back channel is not working and use your MCU on the display to see if the write was successful?

For example:

Start BIST

stop BIST

write 0x66 to register 0x18 on the 948

from the MCU see if register 0x18 =0x66

Regards,

Michael W.

Hi Michael,

As I already wrote I can't write or read anything from 948 after BIST with original MCU on serializer side.

I can write something to 948 after BIST with new MCU(here only for debugging purpose) on display side, but that works fine because I did register dump on both ports. To change port I had to write to register 0x34 and register is accurately changed.

Can you accept my friendship request? I want to send you something but not here on forum...

Thanks!

Best regards,

Tomislav

Hi,

It seems that your forward channel video signal is working but not your forward channel I2C data. I dont see why the forward channel I2C writes would not work. I can understand that the back channel is not working and that the forward channel I2C writes acknowledge would fail. if this was the case then the "I2C Remote Write Auto Acknowledge Port0/Port1" bit could have been set to write the reset register to try to put the 948 in a working state after BIST. 

I accepted your friendship request.

Regards,

Michael W.

Hi Michael,

Obviously I didn't explain well forward channel connection. Please take a look on schematics I sent to you.

We have a two processors connected to serializer:

• The first one is MCU I talk about all the time and it is directly connected to I2C bus and on some GPIOs. That is the one I program. It's a kind of safety processor that check some critical signals and communicates with I2C devices on Deserializer board. 
• The second one is Application processor connected to serializer to HDMI port. It sends video and forward channel is controlled by it. That's my understanding. So I don't have access to I2C channel between App processor and seralizer.

After BIST is disabled, video goes to display so I concluded forward channel is ok. 

Please take a look on schematic.

All problems occur on back-channel . That's my understanding. Maybe I'm wrong...

Everything I did is though I2C on Safety MCU. Preparing pins for BIST, start BIST, stop BIST etc.

Thank you!

Best regards,

Tomislav

Hi Tomislav,

Can you please try to enable and disable BIST by writing to register 0x14 on the 949 and see if this method of enabling BIST does not have this back channel issue.

Regards,

Michael W.

Hi Michael,

Is this the right way to enable and disable BIST? 948 and 949 datasheets say that BIST must be enabled on deserializer via register or pin.

I tried to enable BIST on serializer with register 0x14 but I'm not sure that BIST function is started at all.

PASS pin is low all the time as you can see on waveform...

Best regards,

Tomislav

Hi Tomislav,

It should be a valid way to enable BIST. Can the 949 read from the 948 after the BIST is turned off? what does the BIST BC Error Count register say after BIST is disabled?

Regards,

Michael W.

Hi Michael,

I read in several topics on 2e2 forum that BIST must be started on deserializer. 948 and 949 datasheets say that too.

Ok. How can I check if BIST procedure was enabled? BIST is started on serializer side with register 0x14. I checked this register a few moment later and it has value 0x01 (BIST is enabled).

But... LOCK pin on 948 is LOW as long as BIST is enabled, as you can see on image I sent you in the last post. That is probably not a good sign. Also PASS pin not changed at all, so I doubt BIST procedure was not started properly.

BIST BC Error Count register is 0 and I can read 948 after BIST is disabled, but I think BIST was not started on deserializer side. It seems like that.

Best regards,

Tomislav

Hi,

If you still have access to the 948's registers you can check if the 948 is in BIST by reading the BIST_EN register(0x24) while BIST is enabled on the 949.

Regards,

Michael W.

Hi Michael,

I don't have access to the 948 through back-channel by original MCU, but I managed to read register 0x24 while BIST is enabled using another MCU(added for debugging purpose) connected to local I2C on deserializer side. As I expected BIST_EN bit in register 0x24 is 0, so BIST is not started on deserializer. This is consistent with the state on LOCK and PASS pins while BIST is enabled (on 949).

Best regards,

Tomislav

Hi Tomislav,

I will test this on my setup and get back to you tomorrow.

Regards,

Michael W.

Hi,

I was able to test the system and confirm the behavior that you are seeing but I am not sure that the 948 is not in BIST when the 949 is set to BIST enable. can you tell me what happens to the video being sent across the link when the BIST is enabled on the 949 when BIST is enabled?

Regards,

Michael W.

Hi Michael,

Video is not present on the screen while BIST is enabled and it comes back when BIST is disabled.

But I'm not sure if that is enough to say that BIST is started properly on the both side. According to the datasheets, PASS pin (and LOCK) is an indicator that BIST is started, right?

I guess video is not up because 949 is in BIST mode.

Best regards,

Tomislav

Hi Tomislav,

Yes. Your understanding is correct. Would it possible for you if you can get the scope photo on the PASS pin when the BIST is enabled?

Aaron

Hi Aaron,

I have already attached waveforms of LOCK and PASS pins in post Dec 14, 2020 2:48 PM.

Best regards,

Tomislav

Hi,

Let's return to the scenario when BIST is started on 948 with BISTEN pin...

I have captured the state on I2C bus on serializer 949 side (MCU <->949) and state on I2C bus on deserializer 948 board when BIST is enabled.

Could you please take a look on those? Maybe it can help you to debug the issue.

Bist is enabled when 0xEF is written to the portexpander output register.

Enable BIST on I2C on DESERIALIZER side:

Enable BIST on I2C on SERIALIZER side_1:

Enable BIST on I2C on SERIALIZER side_2:

Enable BIST on I2C on SERIALIZER side_3:

Thank you!

Best regards,

Tomislav