SN65DP159: No input HDMI vedio signals on monitor

Shane

Can I take a look at your schematic and can you also mark on the schematic where you jump wired the fix?

Thanks
David

0385.sch_DP159.pdfHi David,

I attached files for schematics and jump wired for reference.

If avaiable, could you help to arrange a FAE to our side for debug this issue? 8838.sch_intel.pdf

Shane

1. I would remove R500 since the OE pin already has an internal pullup and change C557 to 0.22uF cap

2. Please leave TERM, PRE_SEL, and EQ to be NC

3. I would reduce the R494 to 6.4k

Can you please verify the DP159_HPD_SNK is driven high. If DP159_HPD_SNK is driven high, can you please probe the clock output and verify the clock frequency? 

Can you also dump out the DP159 Page 0 and Page 1 registers? To dump out the Page 1 registers, please write 0x01 to register 0xFF first, and then dump from register 0x00 to 0xB1.

Thanks

David

David,

1. I would remove R500 since the OE pin already has an internal pullup and change C557 to 0.22uF cap

    -->Rework done

2. Please leave TERM, PRE_SEL, and EQ to be NC

   -->Rework done

3. I would reduce the R494 to 6.4k

  -->Rework done

Can you please verify the DP159_HPD_SNK is driven high. If DP159_HPD_SNK is driven high, can you please probe the clock output and verify the clock frequency? 

 -->Yes, HPD_SNK is driven high and clock output is about 148MHz. Please see the attached wavefoem.

Can you also dump out the DP159 Page 0 and Page 1 registers? To dump out the Page 1 registers, please write 0x01 to register 0xFF first, and then dump from register 0x00 to 0xB1.

-->I don't know what your meaning for DP159 Page 0 and Page 1 registers

Thanks

Shane

Shane

If you are seeing the clock output, to me the DP159 is working. I will double check the lane order between the Intel Elkhart Lake and the DP159 and the rework you did to make sure they are correct.

If you change the resolution to 1080p or 4k@30Hz, are you able to see the clock frequency change as well? 

Page 0 registers are the registers in the DP159 datasheet. Page 1 registers are TI internal diagnostic registers. To dump out the Page 1 registers, please write 0x01 to register 0xFF first, and then dump from register 0x00 to 0xB1.

Thanks
David

David,

The clock out is Intel side, I re-measure the clock waceform for both Intel and DP159.

No clock signals from DP159, please refer to attached waveform.

Thanks!

Shane 

Shane

Just to double check, when you are measuring the clock output, is the scope probe terminated to 3.3V through the 50ohm termination?

Are you seeing this issue on multiple DP159 board? 

I have reached out to the FAE in Taiwan and asked them to get in touch with you.

Thanks

David

David,

Just to double check, when you are measuring the clock output, is the scope probe terminated to 3.3V through the 50ohm termination?

-->Sure.

Are you seeing this issue on multiple DP159 board? 

-->No

I have reached out to the FAE in Taiwan and asked them to get in touch with you.

-->Can you assign a FAE to our side for supporting this isser? Because this issue is a little bit crical for our project.

Thanks!

Shane

Shane

I understand the criticality of your project. Mark, who is our local FAE, will reach out to you and schedule a conference call to resolve this issue.

If you are not seeing this issue on multiple DP159 boards, Is this the only board which you are seeing the issue? If this is the case, have you tried to swap the re-flow or swap the unit?

Thanks

David