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Original question:

TUSB9261 problem

TUSB9261: TUSB9261 continually resets

David Walker2
Prodigy 50 points
Part Number: TUSB9261
Other Parts Discussed in Thread: HD3SS3212, TIDA-00882, TUSB321, TUSB321AI

I have a problem with the TUSB9261 where it continually resets itself. So you can follow along, the schematic is attached.
The design is basically a USB-C to mSATA bridge. This schematic is an untested revision; the previous revision had the SATA RX and TX pairs swapped and this is the version I've been using for testing. I attempted to rework the board by running new traces for the mSATA RX/TX pairs. As you might suspect, it still doesn't work. The unit appears to reset about every three seconds. The debug output is shown below.
I believe what is happening is that the signal integrity on the reworked traces is too poor to establish a SATA connection so the chip eventually times out with a watchdog reset.
Does this sound reasonable to you? Could you look it over the attached schematic and make sure that I'm not missing something else fundamental?
\n\r

||   TUSB926x Firmware v1.06 [Jan  5 2018 12:01:57]   ||\n\r
||                 Device ID: 0x0000                  ||\n\r

\n\r
 Reset Flag(s): [Watchdog] [Power-Up]\n\r
\n\r
[0000000001] Datapath RAM Usage: 80208 / 81920 bytes.\n\r
[0000000001] Supported NCQ Depth: 32\n\r
[0000000001] U1/U2 Transistions: OFF\n\r
[0000000001] USB PHY Suspend: ON\n\r
[0000000001] SATA LPM: OFF\n\r
[0000000001] Device is Self-powered.\n\r
[0000000001] -> usb_hal_init()\n\r
[0000000001] USB Core Ver: 0x120a.\n\r
[0000000001] USB SSC is OFF.\n\r
[0000000051] -> usb_hal_connect()\n\r
[0000000051][0000000051] LTSSM state = (0x5) RX DETECT.\n\r
 -> ahci_init()\n\r
[0000000051] -> ahci_hba_reset()\n\r
[0000000150] HS/FS/LS state = (0x0) ON.\n\r
[0000000153] HS/FS/LS state = (0x5) EARLY SUSPEND.\n\r
[0000000156] HS/FS/LS state = (0x3) SUSPEND.\n\r
[0000000255] USB Reset event occurred.\n\r
[0000000270] Connected at HIGH speed.\n\r
[0000000270] HS/FS/LS state = (0x0) ON.\n\r
[0000000306] -> ahci_wait_complete() timed out! Rd: 0xfb000128 = 0x00000001, cmplt_val = 0x00000003.\n\r
[0000000306] -> ahci_port_reset(0)\n\r
[0000000307] -> usb_hal_set_address() - addr: 0xf.\n\r
[0000000323] -> handle_usb_set_configuration() - val = 1.\n\r
[0000000361] -> ahci_wait_complete() timed out! Rd: 0xfb000128 = 0x00000001, cmplt_val = 0x00000003.\n\r
[0000000361] -> ahci_port_reset(0)\n\r
[0000000416] -> ahci_wait_complete() timed out! Rd: 0xfb000128 = 0x00000001, cmplt_val = 0x00000003.\n\r
[0000000416] -> ahci_port_reset(0)\n\r
[0000000471] -> ahci_wait_complete() timed out! Rd: 0xfb000128 = 0x00000001, cmplt_val = 0x00000003.\n\r
[0000000471] -> ahci_port_reset(0)\n\r
[0000000526] -> ahci_wait_complete() timed out! Rd: 0xfb000128 = 0x00000001, cmplt_val = 0x00000003.\n\r
[0000000526] -> ahci_port_reset(0)\n\r
[0000000581] -> ahci_wait_complete() timed out! Rd: 0xfb000128 = 0x00000001, cmplt_val = 0x00000003.\n\r
[0000000581] -> ahci_port_reset(0)\n\r
[0000000636] -> ahci_wait_complete() timed out! Rd: 0xfb000128 = 0x00000001, cmplt_val = 0x00000003.\n\r
[0000000636] -> ahci_port_reset(0)\n\r
[0000000691] -> ahci_wait_complete() timed out! Rd: 0xfb000128 = 0x00000001, cmplt_val = 0x00000003.\n\r
[0000000691] -> ahci_port_reset(0)\n\r
[0000000746] -> ahci_wait_complete() timed out! Rd: 0xfb000128 = 0x00000001, cmplt_val = 0x00000003.\n\r
[0000000746] -> ahci_port_reset(0)\n\r
[0000000801] -> ahci_wait_complete() timed out! Rd: 0xfb000128 = 0x00000001, cmplt_val = 0x00000003.\n\r
[0000000801] -> ahci_port_reset(0)\n\r
[0000000856] -> ahci_wait_complete() timed out! Rd: 0xfb000128 = 0x00000001, cmplt_val = 0x00000003.\n\r
[0000000856] -> ahci_port_reset(0)\n\r
[0000000911] -> ahci_wait_complete() timed out! Rd: 0xfb000128 = 0x00000001, cmplt_val = 0x00000003.\n\r
[0000000911] -> ahci_port_reset(0)\n\r
[0000000966] -> ahci_wait_complete() timed out! Rd: 0xfb000128 = 0x00000001, cmplt_val = 0x00000003.\n\r
[0000000966] -> ahci_port_reset(0)\n\r
[0000001021] -> ahci_wait_complete() timed out! Rd: 0xfb000128 = 0x00000001, cmplt_val = 0x00000003.\n\r
[0000001271] -> ahci_wait_complete() timed out! Rd: 0xfb000128 = 0x00000001, cmplt_val = 0x00000003.\n\r
[0000001271] -> ahci_port_reset(0)\n\r
[0000001326] -> ahci_wait_complete() timed out! Rd: 0xfb000128 = 0x00000001, cmplt_val = 0x00000003.\n\r
[0000001326] -> ahci_port_reset(0)\n\r
[0000001381] -> ahci_wait_complete() timed out! Rd: 0xfb000128 = 0x00000001, cmplt_val = 0x00000003.\n\r
[0000001381] -> ahci_port_reset(0)\n\r
[0000001436] -> ahci_wait_complete() timed out! Rd: 0xfb000128 = 0x00000001, cmplt_val = 0x00000003.\n\r
[0000001436] -> ahci_port_reset(0)\n\r
[0000001491] -> ahci_wait_complete() timed out! Rd: 0xfb000128 = 0x00000001, cmplt_val = 0x00000003.\n\r
[0000001491] -> ahci_port_reset(0)\n\r
[0000001546] -> ahci_wait_complete() timed out! Rd: 0xfb000128 = 0x00000001, cmplt_val = 0x00000003.\n\r
[0000001546] -> ahci_port_reset(0)\n\r
[0000001601] -> ahci_wait_complete() timed out! Rd: 0xfb000128 = 0x00000001, cmplt_val = 0x00000003.\n\r
[0000001601] -> ahci_port_reset(0)\n\r
[0000001656] -> ahci_wait_complete() timed out! Rd: 0xfb000128 = 0x00000001, cmplt_val = 0x00000003.\n\r
[0000001656] -> ahci_port_reset(0)\n\r
[0000001711] -> ahci_wait_complete() timed out! Rd: 0xfb000128 = 0x00000001, cmplt_val = 0x00000003.\n\r
[0000001711] -> ahci_port_reset(0)\n\r
[0000001766] -> ahci_wait_complete() timed out! Rd: 0xfb000128 = 0x00000001, cmplt_val = 0x00000003.\n\r
[0000001766] -> ahci_port_reset(0)\n\r
[0000001821] -> ahci_wait_complete() timed out! Rd: 0xfb000128 = 0x00000001, cmplt_val = 0x00000003.\n\r
[0000001821] -> ahci_port_reset(0)\n\r
[0000001876] -> ahci_wait_complete() timed out! Rd: 0xfb000128 = 0x00000001, cmplt_val = 0x00000003.\n\r
[0000001876] -> ahci_port_reset(0)\n\r
[0000001931] -> ahci_wait_complete() timed out! Rd: 0xfb000128 = 0x00000001, cmplt_val = 0x00000003.\n\r
[0000001931] -> ahci_port_reset(0)\n\r
[0000001986] -> ahci_wait_complete() timed out! Rd: 0xfb000128 = 0x00000001, cmplt_val = 0x00000003.\n\r
[00000
\n\r

||   TUSB926x Firmware v1.06 [Jan  5 2018 12:01:57]   ||\n\r
||                 Device ID: 0x0000                  ||\n\r

  • 0
    TI__Guru 64326 points

    Hi David,

    I believe you theory is correct. When you say you "swapped" the TX and RX you are not referring to the pin polarity correct? You should be able to use the regular version of the FW based on the schematic provided (i.e. only TX has polarity swap). If TX and RX channels are swapped on the SATA connector there will definitely be issues. From the debug log it does look like TUSB8261 is not detecting a SATA device to connect. Please ensure with external wires that polarity of TX and RX matches the FW used. 

    Some notes on the schematic: 

    • FREQSEL pins should be pulled up to VCC with a 4.7k resistor.

    • USB 3 TX path is AC coupled twice. TX1/2 should be AC coupled with 220nF and RX1/2 should be AC coupled with 330 nF. You can remove the AC coupling on SSTX and SSRX. 

    • Seems you also have issues with USB3 enumeration as well. May want to consider switching to a CC controller like TUSB321A to ensure USB-C compliance.
    • SATA TX and RX look good. 
  • 0 in reply to Malik Barton57
    Prodigy 50 points

    Malik,

    Thanks for the prompt reply. Just for some clarification:

    • I didn't see anything in the datasheet about pulling up to 4.7k. I did notice them on the reference schematics though. Is there concern about coupling power supply noise into the IC? According to the datasheet, they pins have built-in pullups. Can you just leave them unconnected then?
    • I don't see the doubly AC coupled SSTX. I don't think I'm AC coupling the SSRX signals at all. I was following Figure 7 from the HD3SS3212 datasheet (page 13) as well as the TIDA-00882 reference schematic. Is there a requirement for AC coupling the RX signals? If so, this isn't in the datasheet, DEMO EVM schematic, or the TIDA-00882 reference schematic.
    • Oddly enough, it does enumerate USB3. I had a bug in the first hardware revision so I had to ground the select line to the USB SS mux. If I flip the cable over, the SS signal goes low and illuminates an LED.

    David

  • 0 in reply to David Walker2
    Prodigy 50 points

    Oh, and I thought about using the TUSB321, but the part is only available in a package with a 0.4mm pitch. As all I needed was an indication of which side of the connector the super-speed signals were on, I figured a simple comparator was all I really needed. I don't need to know what current limit PD negotiated. Am I neglecting something?

    David

  • 0 in reply to David Walker2
    TI__Guru 64326 points

    Hi David,

    Sorry about that, you are correct on the SSTX AC coupling . I would still recommend AC coupling the HD3SS3212 with 220nF on TX1/2 and 300 nF on RX1/2. These are newer recommendations based on update USB specification. 

    Not sure what may be going on with the comparator just from the schematic but I will say that using CC controller gives you better coverage in terms of interop as these parts like TUSB321AI are designed to detect a variety of different "Rp" implementations (not always a simple pull-up resistor). My main concern with discrete solution when it comes to USB-C compliance lies within USB-C state diagram compliance and more practically timing with the CVS tester. 

    Adding 4.7k resistors are used to limit the leakage current wand is recommended. Short to Vcc may be okay at this expense.  

  • 0 in reply to Malik Barton57
    Prodigy 50 points

    To help others who may be having similar problems, I carefully checked the effects of my rework, and discovered that the rework imparted a (unexpected to me) polarity change on both of the RX and TX SATA signals. Before rework, there was no polarity inversion. After loading the SATA_POLARITY_SWAP_BOTH firmware, the board seems to be functioning properly. The key takeaways:

    • If the chip resets periodically, it could be due to a polarity inversion on the SATA RX or TX pairs.
    • Reworking even the SATA RX and TX signals is possible. To do the rework, I used circuitmedic 5 mil traces and tried to keep them spaced the same as the desired transmission line. After completing the rework, I coated the repair with nail polish (red in this case because it matched the board). It was super fiddly, but it seems to be effective.

  • 0 in reply to David Walker2
    TI__Guru 64326 points

    Thanks for the useful tips! Glad you were able to resolve your issue.