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Original question:

DP83869HM: Media Converter should have any termination Required ?

DP83869HM: DP83869 Signal Detect Polarity & Programmability

Dallas Clow
Intellectual 360 points
Part Number: DP83869HM
Other Parts Discussed in Thread: DP83869

It appears based on several threads that the signal detect (SD) signal is active-low (would usually be referred to as LOS instead of SD or have some active-low indication). 

https://e2e.ti.com/support/interface/f/138/t/910351

https://e2e.ti.com/support/interface/f/138/t/769396

https://e2e.ti.com/support/interface/f/138/p/934072/3470807

In the third thread, Justin indicates that the polarity of the SD signal is programmable via bit 2 of register 0x30 (undocumented vendor-specific, internal configuration register).  I have a design that uses a transceiver with an SD output (as opposed to LOS), missed the polarity of this signal, and could use the programmable inversion (or perhaps a disable of the SD signal) if it's available.  I'm operating in the 1000M media converter mode and it doesn't appear that there is a strap or any other way to disable this signal like there is for the RGMII fiber modes.  It's not clear from the datasheet, but this signal is used in media converter mode and will prevent a link if it's not correct.

I've tried the address 0x30, bit 2 approach and it seems to have no effect.  Is there a way to change the polarity of the SD signal?

Thanks.

  • 0
    TI__Genius 11725 points

    Hi Dallas,

    First, I would like to ensure the device is set for the correct mode and extended register access is working properly. Can you provide a read of the following registers:

    • 0x0
    • 0x1
    • 0x30
    • 0x32
    • 0x6E
    • 0x6F
    • 0x1DF

    Thank you,

    Nikhil

  • 0 in reply to Nikhil Menon
    Intellectual 360 points

    Sure.  Here are the requested registers.  This is with a pull-down resistor connected to the SD pin (only connection to the pin) and the device operating correctly in 1000M media converter mode.  This data was captured over Ethernet via the DP83869.

    0x000: 0x1140
    0x001: 0x7969
    0x030: 0x0000
    0x032: 0x0050
    0x06E: 0x080E
    0x06F: 0x0000
    0x1DF: 0x0044

  • 0 in reply to Dallas Clow
    Intellectual 360 points

    Here is the full register dump.  The only write being done as part of initialization is the write of 0x1FFC to location 0x01EC.  However, this capture is showing that 0x01EC[0] is set.

    0x000: 0x1140
    0x001: 0x796D
    0x002: 0x2000
    0x003: 0xA0F1
    0x004: 0x0001
    0x005: 0xCDE1
    0x006: 0x006D
    0x007: 0x2001
    0x008: 0x4006
    0x009: 0x0300
    0x00A: 0x7800
    0x00D: 0x401F
    0x00E: 0x0000
    0x00F: 0xF000
    0x010: 0x5048
    0x011: 0xAC02
    0x012: 0x0000
    0x013: 0x0000
    0x014: 0x29C7
    0x015: 0x0000
    0x016: 0x0000
    0x017: 0x0040
    0x018: 0x6150
    0x019: 0x4000
    0x01A: 0x0002
    0x01E: 0x0012
    0x01F: 0x0000
    0x025: 0x0480
    0x02C: 0x141F
    0x02D: 0x0000
    0x02E: 0x0221
    0x030: 0x0000
    0x031: 0x10B0
    0x032: 0x0050
    0x033: 0x0000
    0x037: 0x0000
    0x039: 0x0000
    0x03A: 0x0000
    0x043: 0x07A0
    0x04F: 0x0176
    0x06E: 0x080E
    0x06F: 0x0000
    0x086: 0x0077
    0x134: 0x1000
    0x135: 0x0000
    0x170: 0x0C0F
    0x180: 0x0752
    0x181: 0xC850
    0x182: 0x5326
    0x183: 0xA01E
    0x184: 0xE976
    0x185: 0x19CF
    0x190: 0x0000
    0x191: 0x0000
    0x192: 0x0000
    0x193: 0x0000
    0x194: 0x0000
    0x195: 0x0000
    0x196: 0x0000
    0x197: 0x0000
    0x198: 0x0000
    0x199: 0x0000
    0x1A4: 0x0000
    0x1A5: 0x0000
    0x1A6: 0x0000
    0x1DF: 0x0044
    0x1E0: 0x417A
    0x1EC: 0x1FFD
    0xC00: 0x0140
    0xC01: 0x614D
    0xC02: 0x2000
    0xC03: 0xA0F1
    0xC04: 0x0020
    0xC05: 0x0000
    0xC06: 0x0004
    0xC07: 0x2001
    0xC08: 0x0000
    0xC18: 0x01FF
    0xC19: 0x0000

  • 0 in reply to Dallas Clow
    TI__Genius 11725 points

    Hi Dallas,

    Thanks for the detailed register dump. I will look into the data for any discrepancies. Additionally can you please provide a schematic? I will look into the register settings and schematic and make sure the device is correctly set and both schematic and register settings are aligned. I will provide feedback by next week.

    Thank you,

    Nikhil

  • 0 in reply to Nikhil Menon
    Intellectual 360 points

    Here is the schematic.  Note that the SERDES_SD signal has been replaced by a pull-down resistor.  That change makes the DP83869 start working.  Prior to that change the SYNC_STATUS, 0x4F[8] would never set.  After that change it is always set.

  • 0 in reply to Dallas Clow
    TI__Mastermind 18425 points

    Hello,

    Thanks for the follow up. Replies on E2E are delayed due to end of year holidays. We will get back to you by Jan 7.

    -Regards

    Aniruddha

  • 0 in reply to Aniruddha Khadye
    TI__Genius 11725 points

    Hi Dallas,

    Based on the most recent register dump, it looks like register 0x1 is showing that valid link has been established. You also mention after placing the pull-down resistor that the DP83869 starts working. Does this mean the SD signal is now working as expected?

    I noticed the register 0x32 is not it's default value 0xD0, and is now 0x50. Bit[7] is a reserved bit. Was this change part of the initialization? After initialization does resetting 0x32 = 0xD0 affect performance? 

    As for the register 0x1EC issue, does multiple attempts to write bit[0] = 0 after initialization also result in the bit not being cleared?

    Thank you,

    Nikhil

  • 0 in reply to Nikhil Menon
    TI__Genius 11725 points

    Hi Dallas,

    One further comment, if you are still having issues with the SD signal, you may try setting Fiber mode to Auto-negotiate as a debug step, by removing the pull-up on LED0. This will confirm there is not an issue with the strap setting.

    Thank you,

    Nikhil

  • 0 in reply to Nikhil Menon
    Intellectual 360 points

    Nikhil,

    As mentioned above, the SERDES_SD signal has been replaced by a pull-down resistor.  There is now only a pull-down resistor on pin 24 and no other signal connected.  The PHY is capable of linking now, but sometimes takes quite a long time to do it after the Ubuntu OS boots (couple of minutes or more).

    Are you able to answer the original question regarding changing the polarity of the SD signal via register 0x30?  Is it possible to change the polarity via that register or some other register?

    Register 0x32 is never written during initialization or operation.  As described above, the only write being done as part of initialization is the write of 0x1FFC to location 0x01EC.  There are no other writes occurring during initialization or operation.

    I can try changing the value of 0x32 and using multiple writes to address 0x1EC after initialization in a week or two when the second set of HW arrives.

    Thanks,

    Dallas

  • 0 in reply to Nikhil Menon
    Intellectual 360 points

    Thanks Nikhil.  We will try changing the auto-negotiation strap in a week or two with the new HW as well.

  • 0 in reply to Dallas Clow
    TI__Genius 11725 points

    Hi Dallas,

    In regards to the original question, polarity control via register 0x30 should be fairly straightforward. It is unfortunate that this is a persistent issue and my recommendation would be to try to isolate the issue by removing any other possible sources of error and bringing us to a known good setup.

    In regards to register 0x32, I understand that this register is not written to during initialization. However, when reading this value back, it seems to have strayed from the default. As you have mentioned, please try changing the value of register 0x32 back to the default value. 

    Please update me when the new hardware arrives.

    Thank you,

    Nikhil

  • 0 in reply to Dallas Clow
    Intellectual 360 points

    Nikhil,

    I was able test the recommendations today.  We're using the device on a Linux-based system.  The device links during the BIOS boot then loses link as Linux boots and takes 30-180 seconds to re-establish link.

    Removing the LED0 pull-up to enable auto-negotiation didn't work. That resulted in a link never being established.

    Writing 0x1FFC to 0x01EC after eventually linking up results in the register value remaining at 0x1FFC.

    Writing a value of 0xD0 to register 0x32 seem to bring the link up immediately.

    Here are a few of the register dumps.

    It will be another week or two before I can do more testing, writing 0xD0 to register 0x32 does quickly bring the link up. 

    Register contents immediately after boot while not linked:

    0x000: 0x1140
    0x001: 0x7949
    0x002: 0x2000
    0x003: 0xA0F1
    0x004: 0x0001
    0x005: 0x0000
    0x006: 0x0066
    0x007: 0x2001
    0x008: 0x0000
    0x009: 0x0300
    0x00A: 0x0000
    0x00D: 0x0000
    0x00E: 0x0000
    0x00F: 0xF000
    0x010: 0x5048
    0x011: 0x1002
    0x012: 0x0000
    0x013: 0x9C40
    0x014: 0x29C7
    0x015: 0x0000
    0x016: 0x0000
    0x017: 0x0040
    0x018: 0x6150
    0x019: 0x4000
    0x01A: 0x0002
    0x01E: 0x0012
    0x01F: 0x0000
    0x025: 0x0480
    0x02C: 0x141F
    0x02D: 0x0000
    0x02E: 0x0221
    0x030: 0x0000
    0x031: 0x10B0
    0x032: 0x0050
    0x033: 0x0000
    0x037: 0x0000
    0x039: 0x0000
    0x03A: 0x0000
    0x043: 0x07A0
    0x04F: 0x0126
    0x06E: 0x080E
    0x06F: 0x0000
    0x086: 0x0077
    0x134: 0x1000
    0x135: 0x0000
    0x170: 0x0C10
    0x180: 0x0752
    0x181: 0xC850
    0x182: 0x5326
    0x183: 0xA01E
    0x184: 0xE976
    0x185: 0x19CF
    0x190: 0x0000
    0x191: 0x0000
    0x192: 0x0000
    0x193: 0x0000
    0x194: 0x0000
    0x195: 0x0000
    0x196: 0x0000
    0x197: 0x0000
    0x198: 0x0000
    0x199: 0x0000
    0x1A4: 0x0000
    0x1A5: 0x0000
    0x1A6: 0x0000
    0x1DF: 0x0044
    0x1E0: 0x417A
    0x1EC: 0x1FFD
    0xC00: 0x0140
    0xC01: 0x6149
    0xC02: 0x2000
    0xC03: 0xA0F1
    0xC04: 0x0020
    0xC05: 0x0000
    0xC06: 0x0004
    0xC07: 0x2001
    0xC08: 0x0000
    0xC18: 0x01FF
    0xC19: 0x0010

    Register contents after waiting for the link to come up:

    0x000: 0x1140
    0x001: 0x7969
    0x002: 0x2000
    0x003: 0xA0F1
    0x004: 0x0001
    0x005: 0xCDE1
    0x006: 0x006F
    0x007: 0x2001
    0x008: 0x4006
    0x009: 0x0300
    0x00A: 0x7800
    0x00D: 0x0000
    0x00E: 0x0000
    0x00F: 0xF000
    0x010: 0x5048
    0x011: 0xBC02
    0x012: 0x0000
    0x013: 0x9D40
    0x014: 0x29C7
    0x015: 0x0000
    0x016: 0x0000
    0x017: 0x0040
    0x018: 0x6150
    0x019: 0x4000
    0x01A: 0x0002
    0x01E: 0x0012
    0x01F: 0x0000
    0x025: 0x0480
    0x02C: 0x141F
    0x02D: 0x0000
    0x02E: 0x0221
    0x030: 0x0000
    0x031: 0x10B0
    0x032: 0x0050
    0x033: 0x0000
    0x037: 0x0000
    0x039: 0x0000
    0x03A: 0x0000
    0x043: 0x07A0
    0x04F: 0x0126
    0x06E: 0x080E
    0x06F: 0x0000
    0x086: 0x0077
    0x134: 0x1000
    0x135: 0x0000
    0x170: 0x0C10
    0x180: 0x0752
    0x181: 0xC850
    0x182: 0x5326
    0x183: 0xA01E
    0x184: 0xE976
    0x185: 0x19CF
    0x190: 0x0000
    0x191: 0x0000
    0x192: 0x0000
    0x193: 0x0000
    0x194: 0x0000
    0x195: 0x0000
    0x196: 0x0000
    0x197: 0x0000
    0x198: 0x0000
    0x199: 0x0000
    0x1A4: 0x0000
    0x1A5: 0x0000
    0x1A6: 0x0000
    0x1DF: 0x0044
    0x1E0: 0x417A
    0x1EC: 0x1FFD
    0xC00: 0x0140
    0xC01: 0x6149
    0xC02: 0x2000
    0xC03: 0xA0F1
    0xC04: 0x0020
    0xC05: 0x0000
    0xC06: 0x0004
    0xC07: 0x2001
    0xC08: 0x0000
    0xC18: 0x01FF
    0xC19: 0x0010

    Register contents after writing 0x01EC with value 0x1FFC once the link was up:

    0x000: 0x1140
    0x001: 0x7969
    0x002: 0x2000
    0x003: 0xA0F1
    0x004: 0x0001
    0x005: 0xCDE1
    0x006: 0x006F
    0x007: 0x2001
    0x008: 0x4006
    0x009: 0x0300
    0x00A: 0x3800
    0x00D: 0x401F
    0x00E: 0x1FFC
    0x00F: 0xF000
    0x010: 0x5048
    0x011: 0xBF02
    0x012: 0x0000
    0x013: 0x9DC0
    0x014: 0x29C7
    0x015: 0x0000
    0x016: 0x0000
    0x017: 0x0040
    0x018: 0x6150
    0x019: 0x4000
    0x01A: 0x0002
    0x01E: 0x0012
    0x01F: 0x0000
    0x025: 0x0480
    0x02C: 0x141F
    0x02D: 0x2000
    0x02E: 0x0221
    0x030: 0x0000
    0x031: 0x10B0
    0x032: 0x0050
    0x033: 0x0000
    0x037: 0x0000
    0x039: 0x0000
    0x03A: 0x0000
    0x043: 0x07A0
    0x04F: 0x0126
    0x06E: 0x080E
    0x06F: 0x0000
    0x086: 0x0077
    0x134: 0x1000
    0x135: 0x0000
    0x170: 0x0C10
    0x180: 0x0752
    0x181: 0xC850
    0x182: 0x5326
    0x183: 0xA01E
    0x184: 0xE976
    0x185: 0x19CF
    0x190: 0x0000
    0x191: 0x0000
    0x192: 0x0000
    0x193: 0x0000
    0x194: 0x0000
    0x195: 0x0000
    0x196: 0x0000
    0x197: 0x0000
    0x198: 0x0000
    0x199: 0x0000
    0x1A4: 0x0000
    0x1A5: 0x0000
    0x1A6: 0x0000
    0x1DF: 0x0044
    0x1E0: 0x417A
    0x1EC: 0x1FFC
    0xC00: 0x0140
    0xC01: 0x6149
    0xC02: 0x2000
    0xC03: 0xA0F1
    0xC04: 0x0020
    0xC05: 0x0000
    0xC06: 0x0004
    0xC07: 0x2001
    0xC08: 0x0000
    0xC18: 0x01FF
    0xC19: 0x0010

    After writing 0xD0 to 0x32 during boot (link came up quickly afterward)

    0x000: 0x1140
    0x001: 0x7969
    0x002: 0x2000
    0x003: 0xA0F1
    0x004: 0x0001
    0x005: 0xCDE1
    0x006: 0x006F
    0x007: 0x2001
    0x008: 0x4006
    0x009: 0x0300
    0x00A: 0x7800
    0x00D: 0x401F
    0x00E: 0x00D0
    0x00F: 0xF000
    0x010: 0x5048
    0x011: 0xBC02
    0x012: 0x0000
    0x013: 0x9D42
    0x014: 0x29C7
    0x015: 0x0000
    0x016: 0x0000
    0x017: 0x0040
    0x018: 0x6150
    0x019: 0x4000
    0x01A: 0x0002
    0x01E: 0x0012
    0x01F: 0x0000
    0x025: 0x0480
    0x02C: 0x141F
    0x02D: 0x0000
    0x02E: 0x0221
    0x030: 0x0000
    0x031: 0x10B0
    0x032: 0x00D0
    0x033: 0x0000
    0x037: 0x0000
    0x039: 0x0000
    0x03A: 0x0000
    0x043: 0x07A0
    0x04F: 0x0156
    0x06E: 0x080E
    0x06F: 0x0000
    0x086: 0x0077
    0x134: 0x1000
    0x135: 0x0000
    0x170: 0x0C10
    0x180: 0x0752
    0x181: 0xC850
    0x182: 0x5326
    0x183: 0xA01E
    0x184: 0xE976
    0x185: 0x19CF
    0x190: 0x0000
    0x191: 0x0000
    0x192: 0x0000
    0x193: 0x0000
    0x194: 0x0000
    0x195: 0x0000
    0x196: 0x0000
    0x197: 0x0000
    0x198: 0x0000
    0x199: 0x0000
    0x1A4: 0x0000
    0x1A5: 0x0000
    0x1A6: 0x0000
    0x1DF: 0x0044
    0x1E0: 0x417A
    0x1EC: 0x1FFD
    0xC00: 0x0140
    0xC01: 0x6149
    0xC02: 0x2000
    0xC03: 0xA0F1
    0xC04: 0x0020
    0xC05: 0x0000
    0xC06: 0x0004
    0xC07: 0x2001
    0xC08: 0x0000
    0xC18: 0x01FF
    0xC19: 0x0010

  • 0 in reply to Dallas Clow
    TI__Mastermind 18425 points

    Hi Dallas,

    Thanks for sending in your feedback. Nikhil is out of office currently but he will get back to you by Tuesday Feb 9th.

    -Regards

    Aniruddha

  • 0 in reply to Aniruddha Khadye
    TI__Genius 11725 points

    Hi Dallas,

    Based on your summary :

    "I was able test the recommendations today.  We're using the device on a Linux-based system.  The device links during the BIOS boot then loses link as Linux boots and takes 30-180 seconds to re-establish link." 

    I am not clear if this is the initial result you are seeing or if this was after writing to register 0x32. It seems link is able to come up quickly after returning register 0x32 to the default value. Are there still any issues from here?

    Thank you,

    Nikhil

  • 0 in reply to Nikhil Menon
    Intellectual 360 points

    Nikhil,

    The long link times are without writing to register 0x32.  Writing to 0x32 brings the link up immediately.

    The two open issues are:

    • Is it possible to answer the initial question about the SD signal programmable polarity?  Is it possible to change the polarity via register access or not?
    • Writing to address 0x32 works to get the link up quickly in the lab, but this would require custom driver SW to be used.  Is there a reason this write is required for the link to come up quickly or a reason the register was changed from it's default value?  Correcting this issue some other way would be preferred if possible.

    Thanks,

    Dallas

  • 0 in reply to Dallas Clow
    TI__Genius 11725 points

    Hi Dallas,

    As previously mentioned, for SD signal polarity, the polarity of Signal Detect pin of the DP83869 can be changed through register 0x0030[2].

    0x0030[2]: Signal_detect polarity control bit
    0: Invert the polarity of signal detect pin.
    1: Use signal detect as is.

    Given you are achieving link, I would assume this is working correctly. Was there still an issue with SD polarity?

    I will need some time to look into the issue with register 0x32 default settings. I will provide an update by early next week. 

    Thank you,

    Nikhil

  • 0 in reply to Nikhil Menon
    TI__Genius 11725 points

    Hi Dallas,

    I have some additional information with regards to signal detect, register 0x1EC, and register 0x32. 

    1. In media converter opmode, to change SD polarity one has to write 0x0C30[2] instead 0x0030[2]  Link up issue could just be due to this.
    2. In media converter mode 0x0032[7] will be 1’b0 and 0x0032 will be 0050h, reading back 0x0050 is ok, this should not affect link.
    3. Default value of 0x01EC should not be changed it affects link loss functionality in Media converter mode.

    Please let me know if this helps with the link issues you are seeing.

    Thank you,

    Nikhil