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Hi,
We encountered an issue in which XIO2001 on my host side was not able to detect PCI devices connected downstream. For the use case we provided external PCI clock (rated at 33MHz) to XIO2001. Followed by configuration on the EEPROM for register offset D7 = 0x7F, D8 = 0x7F and pull CLKRUN_EN pin to low through 10kW resistor. is there anything which we may have missed out on the design portion?
Also we tried reading through the XIO2001 datasheet Section 9.2.1.2.1.4 PCI Bus Clock Run to get more details on the CLKRUN settings. Can you verify if this section of information would help in diagnosing our issue faced? Would be helpful if some suggestions can be shared to solve this issue. Thanks.
BR,
Leo
Hi Leo,
1). Based on reading data sheet, i believe you seem to have covered points noted in the data sheet.
2). There is implementation guide which outlines clock run in more details. Please attached note a copy of this document.
Regards,, NasserImplementation guide.pdf