DP83867IS: Manual 100M connection

Nico Piatkowski

Part Number: DP83867IS

Hi all,

I would like to disable auto-negotiation and force my DP83867IS to 100MBit connection (because SGMII auto-neg fails for me). I tried to follow the data sheet but it does not work. After power up, This is what I do:

write 0x2100 to BMCR (0x0000)

write 0x4000 to SGMIICTL1 (0x00D3)

write 0x5848 to PHYCR (0x0010)

write 0x2807 to CFG2 (0x0014)

The physical link comes up (reading 0x0001 results in 0x794d), but packages do not arrive at the MAC. The MAC is connected to the PHY via a Xilinx "1G/2.5G Ethernet PCS/PMA or SGMII" softcore which is configured for 100M full duplex. What am I doing wrong here?

Best,

Nico

over 4 years ago

0 Lysny Woodahl over 4 years ago

TI__Expert 3595 points

Hi Nico,

I noticed that you programed SGMIICTL1 for 6 wire mode. Is this correct for your design? Feel free to send a schematic of the connections as well.

Could you also read reg 0x11 and tell me the results?

Thanks,
Lysny

0 Nico Piatkowski over 4 years ago in reply to Lysny Woodahl

Prodigy 60 points

Hi Lysny,

the PHY sits on a Xilinx VCU118 board which requires 6-wire mode (https://www.xilinx.com/support/answers/69494.html). Reading 0x0011 results in 0x6f02, which looks alright. It seems that the external connection is up and running. Can we somehow check for errors at the SGMII side?

Thanks and best,

Nico

0 Lysny Woodahl over 4 years ago in reply to Nico Piatkowski

TI__Expert 3595 points

Hi Nico,

Yes, please check out the loopback modes! They allow you to verify that different stages within the PHY are working correctly.

Thanks,
Lysny

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DP83867IS: Manual 100M connection