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SN65DSI86: LCD output is issue

Part Number: SN65DSI86
Other Parts Discussed in Thread: TEST2

Platform: Zhanrui T618-Android11.0

IC boot initialization mount successfully, back light, no image.Open self - check mode also no image display.

The register setting as below:

  {//FHD, 1920 x 1080 @liupingzhang modify 20190313

//======REFCLK 27MHz ======
setRegitsterValue(0x0A, 0x87);//0x87:REFCLK 27MHz,DSIA CLK at 486 MHz
//======Single 4 DSI lanes======
setRegitsterValue(0x10, 0x26);
//======DSIA CLK FREQ 0x59:445MHz 0x61:485M 0x60:480M 0x45:345M======
setRegitsterValue(0x12, 0x61);
//======DSIB CLK FREQ 0x59:445MHz 0x61:485M 0x60:480M 0x45:345M======
//setRegitsterValue(0x13, 0x61);
//======disabled ASSR======
setRegitsterValue(0xFF, 0x07);
setRegitsterValue(0x16, 0x01);
setRegitsterValue(0xFF, 0x00);
//======enhanced framing and ASSR======
setRegitsterValue(0x5A, 0x05);//0x05
//======2 DP lanes no SSC======
setRegitsterValue(0x93, 0x20);//0x20
//======HBR (2.7Gbps)======
setRegitsterValue(0x94, 0x80);
//======PLL ENABLE======
setRegitsterValue(0x0D, 0x01);
msleep(10);
//======Verify PLL is locked======
//read 0x0A two byte, sleep 10 ms
//getRegitsterValue(0x0A);
//getRegitsterValue(0x0B);
//msleep(10);
//======POST-Cursor2 0dB ======
setRegitsterValue(0x95, 0xE1);//0xE9:1.94dB 0xE1:0dB 0xED:3.10dB
//======Write DPCD Register 0x0010A in Sink to Enable ASSR======
/*
setRegitsterValue(0x64, 0x01);
setRegitsterValue(0x74, 0x00);
setRegitsterValue(0x75, 0x01);
setRegitsterValue(0x76, 0x0A);
setRegitsterValue(0x77, 0x01);
setRegitsterValue(0x78, 0x81);
msleep(10);*/
//======0x0a:Semi-Auto Training 0x09:Fast Link Training======
setRegitsterValue(0x96, 0x09);
msleep(20);
//======Verify Training was successful======
//getRegitsterValue(0x96);
//msleep(10);
//=====CHA_ACTIVE_LINE_LENGTH is 1920 =======
setRegitsterValue(0x20, 0x80);
setRegitsterValue(0x21, 0x07);
//=====CHA_VERTICAL_DISPLAY_SIZE is 1080 =======
setRegitsterValue(0x24, 0x38);
setRegitsterValue(0x25, 0x04);
//=====CHA_HSYNC_PULSE_WIDTH is 32 positive =======
setRegitsterValue(0x2C, 0x20);//0x20
setRegitsterValue(0x2D, 0x00);//0x00
//=====CHA_VSYNC_PULSE_WIDTH is 6 positive=======
setRegitsterValue(0x30, 0x06);//0x06
setRegitsterValue(0x31, 0x00);//0x00
//=====CHA_HORIZONTAL_BACK_PORCH is 152=======
setRegitsterValue(0x34, 0x98);//0x98
//=====CHA_VERTICAL_BACK_PORCH is 50=======
setRegitsterValue(0x36, 0x32);//0x32
//=====CHA_HORIZONTAL_FRONT_PORCH is 120=======
setRegitsterValue(0x38, 0x78);//0x78
//=====CHA_VERTICAL_FRONT_PORCH is 30=======
setRegitsterValue(0x3A, 0x1E);//0x1E
//setRegitsterValue(0x3D, 0x00);
//setRegitsterValue(0x3E, 0x00);

//======DP 0x00-24bpp 0x01-18bpp======
setRegitsterValue(0x5B, 0x01);
//=====COLOR BAR disabled,0x01:Test Model=======
setRegitsterValue(0x3C, 0x00);
//======enhanced framing, ASSR, and Vstream enable======
setRegitsterValue(0x5A, 0x0C);
//======HPD Disable:0x01 Enable:0x00======
setRegitsterValue(0x5C, 0x01);
//======IRQ_EN Disable:0x00 Enable:0x01======
setRegitsterValue(0xE0, 0x01);
}

4606.pdf

  • Hi,

    Does the panel support ASSR? In your code, you had ASSR disabled in DSI86, but then choose to enable the ASSR in the panel through the DPCD registers write. 

    If the panel supports ASSR, you can pull the DSI86 TEST2 pin low and remove this piece of code

    //======disabled ASSR======
    setRegitsterValue(0xFF, 0x07);
    setRegitsterValue(0x16, 0x01);
    setRegitsterValue(0xFF, 0x00);

    Register 0x5A needs to be set to 0x0D

    If the panel does not support ASSR, you need to have the TEST2 pin pulled high to 1.8V through a 1k or a 10k resistor, keep this piece of code below but not enable ASSR in the panel

    //======disabled ASSR======
    setRegitsterValue(0xFF, 0x07);
    setRegitsterValue(0x16, 0x01);
    setRegitsterValue(0xFF, 0x00);

    Register 0x5A needs to be set to 0x0C

    Can you also enable the DSI86 color bar mode first and see if it works?

    Thanks
    David