Hello,
My customer have some question about output state in transition from PU to PD at vcco for ISO77xx family.
[Background]
I show their block diagram and the timing chart that they are concerned as follows.
<Use Case>
Vcci in ISO77xx is the same power rail as MCU.
Vcco in ISO77xx is the different power rail as LIN Transceiver.
Vcci = PU
ENx = Open
INx = High
Vcco = PU -> PD -> PU
In this case, they want to keep high on the OUTx.
<My understanding>
Zone 1 : OUTx = High (However, the OUTx high level depend on Vcco voltage.)
Zone 2 : ??? (I think it is not made Low state and High-Z state.)
Zone 3 : OUTx = High (However, the OUTx high level depend on Vcco voltage.)
[Q1]
Is "Undetermined" listed in D/S (SLLSEU3A) P.20 Table 2 the meaning as "Undefined" ?
[Q2]
In what kind of state will the OUTx be in Zone 2 ?
[Q3]
Is there a way to maintain the OUTx in the state of High in Zone 2 ?
(I accept that it depend on Vcco voltage.)
Best Regards,
Hiroshi Katsunaga