UC1846-SP: Oscillator Discharge Current

Hi Richard,

Looking at various datasheets UC1846-EP on pg. 7 shows Oscillator discharge current to be 7.5mA and not 12mA.
Figure on pg. 7 also highlights discharge current of 7.5mA
UC1846 datasheet on pg. 12 highlights ID = Oscillator discharge current at 25C typically is 7.5mA
However Page 9 of datasheet section 7.3.2 Oscillator shows a pic with 12mA discharge current.
UC1846-SP datasheet on pg. 15 highlights ID = Oscillator discharge current at 25C is typically 7.5mA both in the figure as well as below eq. 4.
Further investigation : looking at Design Note DN-45 for UC3846 oscillator discharge current is not highlighted but left blank.
On Application note U93 " A new Integrated circuit for current mode control" pg. 3.3 Fig. 5 Oscillator circuit highlights discharge current of 12mA. I suspect that is possible source where the 12mA discharge current is highlighted and was copied on to UC1846 datasheet. Will investigate further to see if that is a typo or if design changes were done to lower the discharge current.

Ramesh,

Thanks for looking at this!

This stems from from the following questions from the customer:

My main concern is the fact that there is other documentation for similar 1846 IC's that talks about keeping the dead time above 300nS. According to these documents, dead times below 300nS can cause the current sense to not reset each cycle. This is concerning as your spice model seems to confirm this, you get missed pulses if you have an RC filter on the CS pins and the dead time is too short. Can you comment on this? Do you have any other information on this part of the chip?

Also this documentation states that internal delays add 100nS of dead time if it is too short. This seems to be true, based on our brief testing of the device. Can you comment on this?

Do you have any other information on the oscillator? How much can the discharge current vary?

Also the equations for dead time and oscillation frequency are way off, they imply that the swing at the Ct pin is about 1.08V, in reality it's closer to 1.8V (and is 1.76V in your spice model).

I sent them a link to a post that explained the oscillator frequency and I tried to explain how the dead times was calculated. I explained that the dead time could be less than 300ns, but noise issues made us recommend that the customer keep the dead time at least 300ns. I explained that the dead time of 300ns was seen in using the 1000pf cap values. The calculation (145 * Ct) yields 145ns using the 1000pf cap. Twice this is ~ 300ns. Was my statement correct?

The customer came back with the following questions:

So the recommendation is for the oscillator dead time to be a minimum of 150nS? Then the combined dead time of the 2 outputs is ~300nS. I was originally thinking that the recommendation is to have 300nS dead time per oscillator period, and 600ns combined dead time with 2 outputs. I’m not sure how accurate the spice model is, but it seems to suggest that the 600nS total dead time is needed if a filter is used at the CS pin.

Can you comment on his questions? Changing the discharge current does have an effect on this calculation.

Thanks for your help with this!

Richard Elmquist

Ramesh,

Have you had a chance to look at the questions above?

Please let me know if you have further questions for the customer.

Thanks for your help with this!

Richard Elmquist

Hi Richard,

Can you provide reference to the documents that discuss 300nsec dead time etc as highlighted in your post.

Thanks

Ramesh,

There are references in the data sheet and in the application notes (shown in the question) about keeping the dead time at 300ns or greater due to noise considerations. The questions from the customer are related to this.

The calculations the customer has done yield ~150nS and I believe that this would be 300ns dead time as it relates to each cycle (2x), but I am not sure.

Please reread the questions from the customer and my responses. Am I correctly responding to the customer or am I looking at this wrong? Please let me know.

Thanks for your help with this!

Richard Elmquist

Richard,

As highlighted on email exchange
Just to clarify one point it is important to understand what topology customer is using?
1. Oscillator frequency is equal to the switcher output frequency for single ended converter design such as forward, flyback configurations. Duty cycle can be higher than 50% and less than 100%.
2. However for double ended designs i.e. push-pull/ half-bridge output frequency is one-half the oscillator frequency – duty cycle is limited to less than 50% duty cycle.

Does this address your question/ concern.