Hi There,
I am aware of the requirement that Vref_B during operation and both pins must be pulled up to the HIGH side (VCCB) through a bias resistor (typically 200 kΩ). However, I am curious about why the same requirement applies to the enable pin. As per my understanding, the EN pin should be connected to the MOS gate, which should eliminate any leakage without a pull-up resistor. However, we encountered an issue where there appears to be leakage when we pull the EN pin high without the resistor. Could you please provide the reason behind this?
Thanks,
Louis