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TXS0108E: TXS0108EPWR

Billy Parthipan
Prodigy 60 points
Part Number: TXS0108E

Hi, one of our designs uses TXS0108EPWR as a buffer/power isolator to prevent the A side (ASIC) being damaged/affected when A side is powered off whilst B side is still powered on. Please note both A side and B side are powered at the same voltage level (3.3V) but separate power supplies (3v3D and 3V3_MCP). It has been noticed that if VA is closer or equal to VB (actually VA = VB) the rise time is greatly reduced compared to when there is a difference between the voltage levels of VA and VB. What could be the reason for this? I am not the designer of this, but I will have to implement/design the functionality to do the protection of the A side (ASIC GPIOs) from B side when the ASIC is powered down. B side is a USB Bridge board MCP2210. The design does not use this TXS0108EPWR as a level translator.

Thanks

  • 0
    TI__Mastermind 31156 points

    Hey Billy,

    The TXS0108E is passive translator will not be able to buffer/ redrive the signals from the input to output. It is essentially just an NFET that connects the I/Os with internal 10kohm pullups  and one- shot mechanism that momentarily reduces the output impedance to provide a faster slew rate. My assumption would be that these one shot systems are tied to VCC, where the stronger bias is applied, the lower the impedance of the one shot is when they are activated. 

    This device will also not be able to isolate the I/Os when either VCCA or VCCB is powered down and at 0V (the feature that makes this operation possible is denoted by the feature, IOFF).  For this use case, I would suggest taking a look at the fixed direction/ direction controlled translators such as the LXC8T245 (providing up to 32mA of drive strength)  that will be able to support your buffering/isolation requirements.

    Regards,

    Jack 

  • 0 in reply to Jack Guan
    Prodigy 60 points

    Hi Jack,

    thanks for this explanation and the suggest. So I probably can assume when the VA and VB get closer possibly the ONE-SHOT mechanism fail to operate or not kick in to increase the rise time.

    On the suggestion of using directional buffer/transceiver, I have one issue. The signals this device sees are bi-directional such as SPI, I2C and some GPIOs that we toggle and/or monitor. Therefore having the direction fixed is not suitable. Is my assumption correct here?

    Thanks again for this support

    Regards

    Billy

  • 0 in reply to Billy Parthipan
    TI__Mastermind 31156 points

    Hey Billy, 

    Billy Parthipan said:
    So I probably can assume when the VA and VB get closer possibly the ONE-SHOT mechanism fail to operate or not kick in to increase the rise time.

    The one shot mechanism triggers when a rising edge is sensed at the input. The only time it will fail to operate is if the data rate is too high (then one shot times out), or if the one shot expires early (due to high capacitive load). You may visit A Guide to Voltage Translation With TXS-Type Translators and Leveraging Edge Rate Accelerators with Auto-Sensing Level Shifters for further information. 

    The bi-directionality I am referring to is if the signals per channel are capable of transmitting and receiving (such as I2C). For other bi-directional signals that are fixed per channel (for example signal flows only from A to B on ch. 1 and B to A on ch.2), then a fixed direction or a direction controlled translator can be used. I only see 2 signals in the schematic- could you clarify what interface is supported by the signals you are transmitting?

    Regards,

    Jack