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SN74LVTH125: SN74LVTH125 for 1 pulse per second 3.3V LVTTL 50 ohm load drive compatibility

Part Number: SN74LVTH125
Other Parts Discussed in Thread: SN74AUC125, SN74AUC2G241

Hi Team,

We are planning to use the SN74LVTH125 to drive the 1PPS signal output in our design. As per our design requirement 1PPS signal need to drive 50 Ohms load with <5ns rise time requirements.

So we are choose SN74LVTH125 (IOH = -32ma drive capability) to drive the 1PPS output with two outputs and their respective inputs shorted case.

We are doing this for increasing current drive strength. But in some forum discussions we observed caution note about bus contention in paralleling CMOS outputs cases.

Can you please check and confirm whether we shall use SN74LVTH125 in parallel application to drive 50 ohms load?

can you suggest any other part that may drive 50ohm load with <5ns rise time requirement?

Regards,

Ramesh.

  • Our AUC family is more optimized to handle 50ohm loads: I'd recommend the SN74AUC125.

    Could you share a schematic or quick sketch of what you are doing? I am a little confused by your description. Shorting CMOS outputs together is typically fine as long as their inputs are also shorted together (which is what I think you're describing) although you should use a two channel device such as the SN74AUC2G241 rather than two one channel devices to guarantee you avoid bus contention.

    https://www.ti.com/product/SN74AUC2G241

  • Hi Malcolm Lyn,

    Case 1: I attached the block representation for CMOS output shorting configuration with 50 Ohm

    resistor load.

    Can you please confirm that these configuration will work for driving 50 Ohm

    resistor load without bus contention?

    Case 2: SN74AUC125 & SN74AUC2G241 parts only have maximum -9mA current drive capability.

    We required maximum drive current of 66.66mA(3.33V/50Ohm = 66.66mA) In Absolute Maximum Ratings section of datasheet mentioned that maximum continuous output current is

    +/-20mA, But we need to drive 66mA as per our requirements.

    Can you please confirm that how SN74AUC125 & SN74AUC2G241 shall be used for driving 50 Ohms resistor load?

    Thanks in advance,

    Esakki.

  • Paralleling outputs is allowed; see [FAQ] Can I connect two outputs from a CMOS logic device together directly?

    Please note that 50 Ω inputs are designed to be used with a function generator with a 50 Ω output impedance. These two 50 Ω resistances form a voltage divider, so the function generator must drive its output with 6.6 V so that the receiving device sees 3.3 V at its input.

    All outputs have an output impedance larger than zero. It is not possible for a device with a 3.3 V supply to drive a 50 Ω load with exactly 3.3 V. You could reduce the buffer's output impedance by using all four outputs in parallel, but then the source impedance would no longer be 50 Ω.

  • This looks fine. If you need higher current drive I would stay with the LVT device, keeping in mind what Clemens noted above.