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CD74HC4046A: INH=H affecting VCO output level

József Hermann
Expert 1030 points
Part Number: CD74HC4046A

Tool/software:

Dear Forum,

My application is sensitive to VCO output level when it is stopped by INH=H.

I observed it randomly goes to H or L when INH activated.

Device Appliaction report and an old National MM74HC4046A datasheet show the VCO internal logic, suggesting the 

output shold be go a defined L (TI/Harris) or H (NSC) when stop not by random fashion. Anyway, I control from running to stopped state, when VCO output goes to H

When  INH=H-> timming capacitor swithing bridge BOTH NMOS transistors are ON allowing capac full discharge.

The observed behaviour is quite confusing.

Thanks and regards,

Joseph

  • 0
    TI__Guru* 97920 points

    Hi Joseph,

    This is a very old device, nobody in TI, at least not in our team, ever use it and has experience with it. We do not know what is the VCO output status vs INH pin. 

    I cannot find any timing diagram within TI nor from google search. 

    I am sorry that we are not able to help.

  • 0 in reply to Noel Fung
    Expert 1030 points

    Hi Noel, no problem, thank you vm for spending time on this issue! For a short time, I would not close this topic, I hope I could find a possible rootcause referring to this phenomenon and a workaround.

  • 0 in reply to József Hermann
    TI__Guru* 97920 points

    OK, I will keep this post open till end of this month.

  • 0 in reply to Noel Fung
    Expert 1030 points

    Hi Noel,

    I have made some trials. My experiments suggest the 'HC/HCT4046A VCO internal logic follows exactly the logic shown in SCHA002A TI document for the original Metal Gate CD4046 part (Fig. 8). So, it is normal to VCOout can stay both in H or L accoring to when INH=L actually was applied. If an application requires the VCO shall start from a desidered level any time, an external logic needed for a syncronized stop first (to desidered fall or rise edge of 'VCOout').

    József