SN74LVC1G32-Q1: Input transition rise/fall time

Tool/software:

Hello Logic Team,

I have a question on the rise/fall time of logic device SN74LVC1G32-Q1. 

The supply voltage is 3.3V and, therefore 33ns. Can this be interpreted to not exceed the rise and fall times due to CMOS technology?

And does this time refer to the full voltage swing or on the 10%/90% values?

The background is possible signal filtering at the input before the gate. In my specific case the input signal runs quite far over the board, so I would not do without a low pass filter, currently mitτ_rc=47 ns. In addition, one of the signals is a 2.5 kHz PWM signal, so the gate "needs to switch a little more frequently". How critical is this to see?

Thanks and best regards,

Michael