CD4070B: VIL,max define

Brian Wang0928

Part Number: CD4070B

Tool/software:

Team,

Customer is currently designing the position resolver system of MD by using CD4070B for logic design.

1. In the below circuitry, The U pin of the 4070 is set at 2.5V initially. and U- is set at 2.496V . At this condition, the input condition falls in the undefined region (VIL,max = 1.5V as defined in d/s). In this status, the output of 4070 is pulled high by 3.3V via 4.7K pull-up resistor as circuit shown.

2. And also, when U and U- pin of 4070 are set at 1V, the IC falls in spec defined as VIL,max <1.5V,max. The 4070 is pulled to LOW state.

We just would like to confirm if above items are correctly?

Regards

Brian

5 months ago

0 Clemens Ladisch 5 months ago

Guru 317480 points

For any input voltage between V_IL(max) and V_IH(min), the state of the input is unknown, i.e., it might be high, or low, or oscillating. So the corresponding output will also be high or low or oscillating; it will not be inactive.

Also, you will get shoot-through currents and might damage the device; see [FAQ] How does a slow or floating input affect a CMOS device?

What is the meaning of those U/U− voltages? What is the actual problem you're trying to solve?

0 Brian Wang0928 5 months ago in reply to Clemens Ladisch

TI__Genius 14210 points

Thanks.

For the U/U- Voltage in the schematic, RD just describes how the Input pin voltage of CD4070 is set and just wonder to know if the behavior they found is correct or not? Just confirm with you. thanks.

Regards

Brian

0 Clemens Ladisch 5 months ago in reply to Brian Wang0928

Guru 317480 points

In the undefined region, the behaviout of the output is undefined (but it will drive either high or low).

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CD4070B: VIL,max define