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Original question:

[FAQ] Dual Footprinting - How to design around supply constraints and create flexibility for boards

SN74HCS08: A few questions regarding dual footprints

Kyohei
Genius 3091 points

Part Number: SN74HCS08

Tool/software:

Hi team,

I have a few questions regarding dual footprints.

1．Is there any data that has been verified regarding the impact on EMC for dual footprints?

     There are concerns that floating patterns may occur, and the power/GND wiring may become thinner/longer, which could have an impact.

2. Similar to question 1, when incorporating dual footprint design, the distance from the bypass capacitors and damping resistors to the IC pins may become longer.

    Could this potentially cause any issues?

3.When preparing overlapping implementation pads for large and small packages, is it acceptable to leave the metal mask openings for unused pads?

  Or should the metal mask be used selectively according to the mounted components?

Best regards,

Kyohei

  • +1
    Guru 326760 points

    1. There is no data. I doubt that you will be using RF signals where this would become significant. Regarding longer power traces, it might be possible to add more vias.

    2. For source terminating resistors, the additional distance should be negligible. Bypass capacitor placement is not optimal, but the effect should be small. (See figure 4 of The Bypass Capacitor in High-Speed Environments.)

    3. The metal of an open pad is no less exposed than the pins of the chip; this makes no difference.