• State Resolved
  • Locked Locked
  • Replies 4 replies
  • Answers 1 answer
  • Subscribers 20 subscribers
  • Views 154 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

SN74LVC1G00: Maximum Propagation Delay at Lower Load Capacitance and Resistance

Shinichi Inoue
Guru 21741 points
Part Number: SN74LVC1G00

Tool/software:

Dear Specialists,

My customer is considering SN74LVC1G00 and has a question.

I would be grateful if you could advise.

---

I have a question about the SN74LVC1G00.

Regarding the propagation delay time (tpd) of the SN74LVC1G00, the data sheet lists values of CL=30p, 50p, 15pF, RL=1M, 1k, 500Ω.

Could you please let me know the maximum propagation delay time with lower load capacitance and resistance?

(Background)

I am designing a ring oscillator circuit using this IC.

I would like to confirm the specifications to see how high the oscillation frequency can be increased.

The power supply voltage is 5V.

ｰｰｰ

I appreciate your great help in advance.

Best regards,

Shinichi

  • 0
    TI__Intellectual 1900 points

    Hi Shinichi,

    Propagation delay scales linearly with load capacitance. For any datasheet that includes at least two load conditions, you can use linear extrapolation to get a very good estimate of the delay for different loads. Please see this FAQ for more guidelines and information on estimating specific values between those given in the datasheet.

    For the SN74LVC1G00, you get the following delay extrapolation with an included imaginary "0 load" condition that shows the intrinsic delay of the device. In the case of the SN74LVC1G00, you can use this method to estimate that, for example, a 5pF load capacitance will result in a maximum 3 ns delay. A decreased resistance will not affect this maximum delay.

    Best regards,

    Nikki

  • 0 in reply to Nikki Dengel
    Guru 21741 points

    Hi Nikki,

    Thank you for your reply.

    I shared your suggestion with the customer.

    The customer has additional a question, could you please advise?

    ---

     In section 7.8 of the data sheet, only INPUT A is separated, what are the conditions different?

    If INPUT A has a shorter delay time, I would like to configure a circuit using only this terminal.

    Also, when calculating the delay time here, it is not possible as the spec only has one condition.

    Could you please let me know any other ways to calculate it?

    ---

    I appreciate your great help and cooperation.

    Best regards,

    Shinichi

  • +1 in reply to Shinichi Inoue
    TI__Intellectual 1900 points

    Hi Shinichi,

    After some investigation, it seems that the "From A or B to Y" specifications in the datasheet are correct. The "From A to Y" specifications are written in error. You can expect both INPUT A and INPUT B to have the same delay specifications. We will update the datasheet to reflect this.

    Unfortunately, we do not have data that will allow us to extrapolate the delay times for other capacitance values at the -40C to 125C at 5V. The best estimate we have is to use the linear extrapolation for -40C to 85C temperature range which is reflected in the plot I posted previously. If possible, I suggest measuring the device within your system for a more accurate answer.

    Regards,

    Nikki

  • 0 in reply to Nikki Dengel
    Guru 21741 points

    Hi Nikki,

    Thank you for your reply.

    I shared the information with the customer.

    When the customer has an additional question, I consult you again.

    I appreciate your great help and cooperation.

    Best regards,

    Shinichi