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LSF0204: LSF0204RUTR: Application Review Request for LSF0204 in PECI Interface Translation

Ariharan S
Prodigy 80 points
Part Number: LSF0204
Other Parts Discussed in Thread: LSF0101,

Tool/software:

Hi TI Team,

We plan to use the LSF0204RUTR to translate Intel's PECI interface, which operates at 1V, to 3.3V to interface with an FPGA that operates at 3.3V.


For your reference, we’ve attached the block diagram of our proposed setup.

As you may know, PECI is a push-pull, bidirectional signal that operates at speeds up to 2 Mbps.

Could you please review our application and confirm whether the LSF0204RUTR is suitable for this use case?

We would appreciate it if you could share any concerns or limitations you foresee with this approach.

I appreciate your support.

Thanks,
Ariharan S

  • 0
    TI__Mastermind 49148 points

    Hi Ariharan,

    My feedback is similar to the post for LSF0101 as both devices use the same switch architecture but in different configurations 1-channel vs. 4 channel

     LSF0101: Application Review Request for LSF0101 in PECI Interface Translation 

    Regards,

    Tyler

  • 0 in reply to Tyler Townsend
    Prodigy 80 points

    Hi Tyler, 

    Thanks for the response. 

    We understand that our application will work fine as long as both sides (VCCA and VCCB) of the PU resistors are sized properly. 

    The resistor value is to be determined based on the current syncing ability of the pins, along with the capacitance. 

    However, we would like to understand the intention behind the note from the datasheet, where it is suggested to use a direction control mechanism for bidirectional push-pull drivers.

    Kindly clarify. 

    Thanks, 

    Ariharan S

  • 0 in reply to Ariharan S
    TI__Mastermind 49148 points

    Hi Ariharan,

    This note is put in the datasheet to ensure that one does not actively drive with a push-pull driver on the input and output of this device at the same time. 

    This device is a pass through device, a small RDS_ON resistance separates side 1 from side 2. 

    In the case where one controller on side 1 pulls HIGH and another controller on side 2 drives LOW, there is a brief moment of contention where a low impedance path is created causing a large current to appear through the LSF0204 device. 

    Either the push-pull outputs need to be uni-directional, or they need to be timed in such a way where only 1 controller is driving the bus at a single time. I am not too familiar with PECI interface, but is there ever a case where the uP and CFPGA are driving in opposite directions to each other? 

    Regards,

    Tyler