TPLD1201: ICS can't simulate counter correctly

user4616635

Part Number: TPLD1201

Hi staff,

with TPLD1201, EVM

First, I understand the CNTDLY starts with output L. Actually,

Configured TPLD1201 outputs L from startup: (IO7 = OUTPUT)

But ICS simulation output H:

Second, when RST set H level and, during reset and release time expects output = L.

Configured TPLD1201 (with count=3) also works normally:

Again, ICS simulator doesn't so:

I think this issue is same between datasheet and configured TPLD, and only ICS sim is wrong. Is it true?

Best regards,

Yasunori Okutsu

0 Albert Xu1 2 days ago

Hi,

This is currently a known issue. ICS needs to be updated to match the datasheet and bench test. This will be done by 1Q26.

Bench and datasheet are the correct behavior.

0 user4616635 1 day ago in reply to Albert Xu1

Hi Albert,

I understand. Thank you for your reply.

And I think CNT RST = falling or rising during ICS simulation seems wrong. Is this the same issue?

ICS simulation is very important for the TPLD design and check. So we all hope your update. Thank you.

Best,

Yasunori Okutsu

0 Albert Xu1 1 day ago in reply to user4616635

Hi Okutsu

I have not seen this behavior before, but I will bring this up to the teammember working on the simulation.

0 user4616635 21 hours ago in reply to Albert Xu1

Hi Albert,

Please forward to your team:

Counter sets "RST = Rising only" but simulation shows RST at falling.

Best,

Yasunori Okutsu

0 Albert Xu1 6 hours ago in reply to user4616635

Hi Okutsu-san,

Understood, this is unexpected behavior. I will make note of this for us to also update.

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