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SN74LVC2T45 power-up unintended driven output

Hello,

I'm facing a similar issue as in this thread, but can't find solution in it ;(

Input is VCCB side, output and DIR are VCCA side (DIR is pulled-down with 100k). 

VCCA is 5V stable, input and output are both pulled-down with 100k resistor and when VCCB (3.3V) rises (1.5ms from 0 to 3.3V, monotonic) an unexpected pulse appears at the output for about 150us :

Can you explain this behavior ? My guess is :

Any suggestion ?

Have a good day,

Thomas

  • Hi Thomas,

    This part is supported by the engineers in the Translation forum.

    Thanks,
    Daniel
  • Thomas,

    Please see the post below on possible workarounds:

    Best Regards,
    Nirav

  • Thank you for this answer, 

    My problem is that I really need a glitch-free low-level output at power-on. 

    And from what I understand, with this component, only a high-level output is possible glitch-free at power-on.

    Can you send me an e-mail to confim that ?

    This should have been mentioned in the datasheet !

    We found that a capacitor of 10 nF at the output makes the glitch disappear. We would really appreciate support for sizing this cap to ensure proper behavior.

    Thanks a lot,

    Thomas

  • Hello,

    Can you please bring some support on this workaround?

    From what I understand, this unexpected pulse is not really driven, otherwise it would still be visible with only 10nF to load (@ 20mA). And it's not :


    So I presume that the output impedance is too high (100k) and during power-on something place weakly the output in the high state.

    I can't run some more tests right now but I presume that with a pull-down of 10k or 1k the glitch may disappear as well.

    I think that with the transistor structure of your device, you should be able to help us confirm that.

    We have a call with customers tomorrow,

    Any help will be highly appreciated.

    Thomas

  • Hi Thomas

    Yes, please use a pull down of 10k. A 10k pull down on DIR is also sufficient. If Vcca is stable and always powered before Vccb, you would not see a glitch.

    Few other workarounds, if your application allows you this flexibility:

    1) Pull up inputs to the supply, through pull up resistors. Let the inputs track the supply, there would be no glitch then

    2) The width of the glitch is dependant on the ramp time. The faster the ramp, the narrower the glitch

    Please let us know if this solution works for you.

    Thanks

  • Hi Jennifer,

    VCCA is 5V stable about 40ms before VCCB ramp-up.

    No success with 10k pull-down. A short low level appears more and more with lower resistor: With a 1k pull-down, it's like 2µs 5V then 2µs 0V and then 71µs 5V during 3.3V power-on (VCCB). With higher resistors, 0V is not reached.

    I did some tests with multiple values of capacitor at the output: unexpected pulse is 75µs with 1nF, 75µs with 2nF and 0µs with 3nF and more (tested 5nF, 10nF and 20nF). (A little glitch < 2µs and < 2V is still visible but no has no impact in my application). I can provide curves in a document if you need.

    Can't afford a logic high at startup or a faster rise time (by the way is 1.5ms that slow??) need to find a secure fix. 10nF is the actual solution but I would need theoretical explanation and confirmation.

    Thanks for support,

    Have a good day.
    f