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Conversion from double clock edge triggered data to single clock edge triggered data

Other Parts Discussed in Thread: SN74LVC1G32, SN74LV123A, SN74LVC2G04, SN74LVC1G80

I\m looking for a solution to take 12 bit of data that come out of an MCU on rising edge and falling edge of the clock and do forward them into another IC that accepts only single clock edge data .... MUC is limited in Frequency <= 50MHz so SW change is not possible ... output of the device would need to double the clock then to 100MHz   (40MHz to 80MHz might be as well sufficient).

Thanks a lot!

  • It is possible to use an SN74LV123A Monostable Multivibrator to double a clock -- you just need to select R and C such that the output pulse is <= 50% of the desired output period.  The datasheet has a suggested application that shows how to configure the device such that one channel acts as a rising-edge trigger, and the other channel acts as a falling-edge trigger (image below).  By then connecting both outputs to an OR gate (such as the SN74LVC1G32), the OR gate's output will be a double-frequency square wave of the input.

  • Hello Emrys,

    thanks for the advice about the clock doubler. The propagation delay has a min - max range of once clock period roughly, how to make sure that the data would be in sync with the new generated doubled clock frequency? How to realize a delay on the data lines that would move in sync with the propagation delay drift over temperature of the clock doubler circuit?

    Thank you very much!

    Best Regards

    Michael

  • Perhaps the clock could be doubled prior to the MCU, then halved for use in the MCU using a flip-flop such as the SN74LVC1G80 (4.2ns max delay), then add delay to the doubled clock to match with a buffer (adding 2 inverters, SN74LVC2G04 - 4.1ns max for each gate, would guarantee the doubled clock triggers after the MCU clock).

    I'm afraid I don't have a better suggestion than this.