Other Parts Discussed in Thread: SN74AXC8T245,
Hello,
After checking the leakage issue a bit more, I can say that the previously mentioned 8 uA doesn’t cover everything, because that wasn’t tested properly.
If we remove 200k bias resistors (or connect them to GND on the upper side, which is usually connected to 3V), then we get a clearer picture. The total current consumption impact is 25 uA for U11, 30 uA for U12, and 10 uA for U13. In total, we reduce the consumption by 60-70 uA when disabling the level shifters the mentioned way. This leakage likely has a lot to do with the fact that our 1.8 V rail gets turned off in deep sleep, in the end we measured only 0.6 V instead of 1.8 V (bias voltage on EN pin is around 1.3 V with 200k normally connected). So, in the end there is 8 uA fully justified going through 200k, but there is additional current going through 3V-side pull-ups. Through R37 that is almost 20 uA, through R36 only 5 uA.
Is this normal, since FET’s are biased to be in relatively high impedance, but might not be fully closed if something is sinking current on 1.8 V side?
In any case, we would fix this by connecting 200k to a MCU GPIO pin instead of directly to 3V supply, so we would have control over when level shifters are turned on or off. From the datasheet it seems that it would be fine:
... and we wouldn’t need an open-drain driver directly on EN pin, like it was suggested in video tutorials, since that would result in current going through 200k resistors which we don’t like.
Can you confirm whether this is OK?
Thanks for your help.
