TXS0108E: eSPI translate

Hi Patrick,

What are the requirements for eSPI? For example what is the needed data rate?

Hello

     eSPI operates at 1.8V only and supports one or multiple slave devices (SIO/BMC). SPI slave devices can share the same bus with eSPI slave devices. This interface is not shared and distinct from the SPI interface used for flash device. The eSPI interface on PCH supports 20MHz, 24Mhz, 30MHz, 48MHz and 60MHz. eSPI supports single, dual and quad mode. eSPI and LPC are both supported but only one of them can be implemented as they are mutually exclusive.

     Do we have other device support above requirement? CPU is 1.8V eSPI then translate 3.3V to FPGA. If do through LPC, it is needed to 3.3V to 3.3V. eSPI and LPC are the same pin that is through strap pin to decide which nterface to use. Thank you. So level shift is also need VCCA=VCCB support. Thank you. 

BR

Patrick

The TXB0108 might be fast enough (just barely), but its output drivers are too weak for the eSPI pull-up/pull-down impedances.

The LSF0108 has the same problem as the TXS.

Fast bidirectional buses are not meant to be level shifted. If anybody asked me, I'd recommend to run the FPGA I/Os at 1.8 V.

@ Clemens Ladisch is the problem with TXS that it is too slow?

The common problem of the TXS and the LSF is that they use pull-ups, which is wrong for the eSPI clock.

Thanks