• State TI Thinks Resolved
  • Locked Locked
  • Replies 5 replies
  • Answers 1 answer
  • Subscribers 21 subscribers
  • Views 718 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

SN74LVC07A: SN74LVC07A

Sachin Khanapure
Prodigy 40 points

Part Number: SN74LVC07A
Other Parts Discussed in Thread: SN74LVC1G34

We have used the SN74LVC07A in our design. Out of 6 gate one of the gate used for 8mhz clock signal, but we are not getting proper output from SN74LVC07A.

So please help us for resolve the problem.

  • 0
    Guru 325500 points

    Why are you using a device with open-drain outputs? Do you need level shifting?

    I suspect that the pull-up resistor is too weak, which makes the rising edges too slow. Check with an oscilloscope, and reduce the resistor value until you get a proper square wave.

    The best solution would be to use a buffer with a push/pull output (e.g., SN74LVC1G34), if possible.

  • 0 in reply to Clemens Ladisch
    Prodigy 40 points

    We are using open-drain output because the SN74LVC07A gate output connected to CMOS IC's.

    Gate therefore we used hex buffer SN74LVC07A.

    Also I tried with reduced pull-up resistor till 330E but still the 8 MHz clock signal not shows proper. For more details attached oscilloscope captures.

    If we use the 74LVC125 then clock signal shows proper shape. But we need open drain buffer with multiple gate.

  • 0 in reply to Sachin Khanapure
    TI__Guru* 97666 points

    Hi Sachin,

    At 8 MHz, the pulse width is only 62.5 ns. This is extremely fast for an open-drain driver.

    Let's say the 10% to 90% rise time is desired to be 20ns. In your case, I did a quick calculation based on the provided waveforms and it looks like your load is ~37 pF -- calculation was based on ~62.5ns rise time with 330 ohm pull-up resistor.

    For an RC circuit,10% to 90% rise time is 2.2*R*C, and we know C and the desired time, so we can calculate the required pull-up resistor:

    t_rise = 2.2*R*C

    R = t_rise/(2.2*C)

    R = 20ns/(2.2*37pF) = 246 ohms

    At 3.3V, this will end up sinking 3.3/246 = 13.4 mA into the LVC device per channel when it's in the low state. It's rated to handle 24mA on each channel while maintaining the VOL spec, and can sustain up to 100mA total through GND (6*13.4 = 80.4mA, so no problem there).

  • 0 in reply to Sachin Khanapure
    Guru 325500 points

    That 100 Ω series resistor will also affect the rise time. Lower it, remove it, or replace it with a ferrite bead.