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Original question:

LSF0108: Rising edge is slow, and high value is little low than other signals

LSF0108: Rising edge is slow, and high value is little low than other signals (2)

Chase Jeong
Mastermind 7505 points
Part Number: LSF0108

Hello TI experts,

I asked about LSF0108 schematics as below;

(4) LSF0108: Rising edge is slow, and high value is little low than other signals - Logic forum - Logic - TI E2E support forums

but upper post is locked (resolved) so i post new question.

last time Emrys recommended to remove 2 capacitors (C1121, C1122) but there was same output compared to attaching capacitors.

could you suggest something for more test?

and is there any differences between designing CL22 and CL45?

Best regards,

Chase

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    TI__Mastermind 45835 points

    Hey Chase,

    I don't think that other thread is locked, but we can help on this thread. Were you able to watch all of the videos to understand the LSF functionality? You will see the rising edge is determined by the RC circuit of the pull-up with the load capacitance. This means to adjust the rise time you will have to adjust either of those components. Removing the caps should've really helped with those rounded edges (for logic, 1 nF is a fairly large load). As for the DC offset, you should've seen in the videos that this is dependent on the drive strength of the interfacing device as well as the size of the pull-up. Based on what I am seeing, there is too much current for the driver to handle and you won't get a Low under 680 mV. Just to be clear, you won't be able to fix both problems at the same time as one requires you to increase pull-up size and the other would likely require you to reduce the size.