Hi,
I am wondering how does this chip provide a 3-state Output Logic. I was guessing it has an open-drain or open-collector output to support that. Could you please confirm and as well with an example logic diagram please?
Thanks
Bhushan
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Hi,
I am wondering how does this chip provide a 3-state Output Logic. I was guessing it has an open-drain or open-collector output to support that. Could you please confirm and as well with an example logic diagram please?
Thanks
Bhushan
Hi Bhushan, and welcome to the forums!
I decided to make this an FAQ rather than provide an answer directly since it is a common topic we get questions on. Please take a look and let me know if it answers your question sufficiently:
[FAQ] What's the difference between logic output types (push-pull, open-drain, 3-state)?
Thanks Emrys for preparing this FAQ, it was useful and helped to clarify my question.