TMS570LS0432: ecc test No response

whong zhao

Genius 4180 points

Part Number: TMS570LS0432

Hello

Team

I want to test my software the ECC function

Now In my code ,the start up.c .

SL_Init_ECCTCMRAM(10, TRUE); /* Enable TCM RAM ECC */

I also in the HCG set the esm interrup ,and in esm set esm26 28

the test code is

*(volatile uint32 *)(0x08400000U) ^ 0x03;

*(volatile uint32 *)(0x08400000U) ^ 0x01;

my code dont go in the interrupt ,why??

over 4 years ago

0 whong zhao over 4 years ago

Genius 4180 points

And I also write sl_tcram1REG->RAMCTRL=0x0005010AU

sl_tcram2REG->RAMCTRL=0x0005010AU

0 whong zhao over 4 years ago in reply to whong zhao

Genius 4180 points

And I also write

sl_tcram1REG->RAMCTRL=0x0005010AU

sl_tcram2REG->RAMCTRL=0x0005010AU

......

and I also try

_coredisableramecc_()

*(volatile uint32 *)(0x08400000U)^0x03;

_coreenableramecc_()

uint32 testvalue= *(volatile uint32 *)(0x08000000U)

....

No interrupt is triggered

+1 QJ Wang over 4 years ago in reply to whong zhao

TI__Guru**** 198546 points

Hi Whong,

The default interrupt service routine for ESM group 1 channels is esmLowInterrupt(), please enable VIM channel 20 so the the interrupt generated by ESM group 1-26/28 can be exported to PCU.

If the IRQ is not enable, please enable it.

0 whong zhao over 4 years ago in reply to QJ Wang

Genius 4180 points

Hello

I have already set it up, but I still can’t get in and interrupt.

What else needs attention

0 whong zhao over 4 years ago in reply to whong zhao

Genius 4180 points

Hello

I fine the RAMCTRL ，I write the code in software initialization

sl_tcram1REG->RAMCTRL=0x0005010AU

sl_tcram2REG->RAMCTRL=0x0005010AU

but when the code run in this code ...

_coredisableramecc_()

*(volatile uint32 *)(0x08400000U)^0x03;

_coreenableramecc_()

uint32 testvalue= *(volatile uint32 *)(0x08000000U)

the Register value changed

0 QJ Wang over 4 years ago in reply to whong zhao

TI__Guru**** 198546 points

Hello Whong,

Your code will force a double-bit RAM ECC error. The ESM 3.3 and 3.5 bits are set, and data abort is generated. No interrupt is generated as expected.

To generate single-bit RAM ECC error, please change this instruction:

*(volatile uint32 *)(0x08400000U)^0x03;

*(volatile uint32 *)(0x08400000U)^0x01;

Arm-based microcontrollers

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TMS570LS0432: ecc test No response