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TMS570LS3137: Questions about PBIST

Part Number: TMS570LS3137

1.According to description in the Chpter 7,"Refer to Table 2-5 for information on the RDS values for each memory." Though the Table 2-5 in the TRM presents the RDS of diffrent RAM Group ,there are no exact information about the meaning of RDS. So, if self-test failed, what's the exact meaning of RDS in the RAM Configuration Register (RAMT)?

2.In the Table 2-5, what's the exact meaning of ESRAM1,ESRAM5,ESRAM6,ESRAM8?Are they the RAM of some module?If so, please tell me the exact module and their corresponding relation. And, Why there are no grouping of TCRAM?

3.As you said,Program Control register is a rsved register. "Resume the test if required using Program Control register(offset = 0x16c) STR = 2." If I want to resume the test, how can I program it?

Thanks.

  • Hello,

    1. RDS: Return data select, indicates the memory data slice with in RAM group(RGS)  whose maximum width is generally 32 bits  

    2. ESRAM1/5/6/8: groups for MCU internal RAM. each group is 64KB.

    3. For selftest purpose, the register STR (program control register) needs to be written with the "Resume" value (0x2) on encountering a failure in any of the RAM groups.

  • Thank you for your reply.

    1.Why there are no RDS and RGS information about TCRAM in table 2-5?
    2.If a self-test algorithm runs on corresponding RAM , after self-test completed, the value of field RDS in RAMT is "1", what's the meaning of the "1" ?If the value is "0",what's the meaning?
    3.In register list(the photo1),STR is a resvd register, and couldn't be writen. But in the example context(the photo2), it can be writen to resume self-test. It's inconsistent, which one is true?

  • Hi,

    TRM and datasheet gives fairly clear definition. RGS is memory group, from one memory address to another memory address. The RDS is RAM datapath. The memory bank has a wide width, and it can be divided into several RDS. The PBIST engine will evaluate/compare each RDS of datapath at a time.

    The PBIST engine stops executing the memory self-test whenever a failure occurs in any memory instance for any of the test algorithms.

    I mentioned before. STR register is reserved. Resume test without fixing the issue will not clear the error flag. If you want to try the RESUME, please write 0x2 to this address (offset is 0x16C). When the 0x02 to this address, the test is resumed.