In a recent software release, the chip reported an error for ESM group 1 channel 6 event. The manual indicates that flash ecc found a single-bit correctable error. The customer's application does not allow this error to occur, even if it is correctable. The customer would like to know the following info:
1. What causes this error to occur? What software operation causes flash ecc errors other than hardware failures? The MPU module of the TMS570 prevents accidental flash writes, and since the overwrite flash is blocked, why does the ecc check fail?
2. How does the customer track this error?
3. The meaning of bits[2:0] in the FCOR_ERR_ADD register in the Technical Reference Manual, and the description of FCOR_ERR_POSbits[7:0] are not very easy to understand, would you like to explain it more detail or make some examples?
Thanks a lot!
Best Regards,
Cherry Zhou
