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Original question:

TMS570LS3137: SRAM diagnose

TMS570LS3137: Problem of SL_SelfTest_SRAM

zhang xiaohong
Intellectual 730 points

Part Number: TMS570LS3137

hi,When i call the function SL_SelfTest_SRAM(SRAM_ECC_ERROR_FORCING_2BIT,TRUE,&failInfoTCMRAM), the return value failInfoTCMRAM is ST_FAIL,but normal should be ST_PASS.

（1） I added the printing information in the function SL_SelfTest_SRAM(), and found that the condition in the red box in the figure below does not hold. That is to say, when the fault is injected into a 2bit ECC fault, only B1TCM has a fault flag bit, but B0TCM does not generate a fault flag bit. why？

（2） The parameter SRAM_ECC_ERROR_FORCING_2BIT is an ECC fault that generates 2BIT, but the parameter SRAM_ECC_2BIT_FAULT_INJECT is also generate 2 BIT ECC fault，What is the difference between the two before？

  • 0
    TI__Guru**** 200256 points

    Hi Xiaohong,

    1. I will check this one

    2. They are same. Both is to flip 2-bit of the ECC value.

  • 0 in reply to QJ Wang
    TI__Guru**** 200256 points

    Just reviewed the code,

    The function injects error to both even and odd bank of SRAM:

    And read the SRAM content to generate ECC error:

    The code looks fine.

  • 0 in reply to QJ Wang
    Intellectual 730 points

    hi，QJ，I am still very confused, my test result still fails. And I found in the test that when I was performing SRAM diagnosis, when I called the library function SL_SelfTest_SRAM() and set different TestTypes, the different order of diagnosis types had an impact on the test results.

    （1）If I first set testType to SRAM_ECC_ERROR_FORCING_2BIT, the test result fails, the test result is as shown below， B0TCM does not generate a fault flag bit. 

    （2） But as long as the SRAM_ECC_2BIT_FAULT_INJECT parameter is called first, and then SRAM_ECC_ERROR_FORCING_2BIT is set, the test can be passed normally. As shown in the figure below, B0TCM and B1TCM are both correct. What is the reason? Why does the sequence of calling different parameters affect?

  • 0 in reply to zhang xiaohong
    TI__Guru**** 200256 points

    I recommend disabling the interrupt when performing the flash and SRAM ECC selftest.