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Original question:

Getting FMC - correctable error: bus1 and bus2 interfaces

TMS570LS3137: Issue with CRC module in semi CPU mode

Sebastien Chapeau
Intellectual 270 points
Part Number: TMS570LS3137

Hi

I’m stuck with an issue I can’t figure out.

I’m using the CRC module in semi CPU mode triggered by RTI.

The code written is largely inspired by SPNA235 and the corresponding example project.

RTI3 compare is set at 1us like in the example.

 

The CRC tables for my project is as follows:

_boot_crc_table @ 00043060 records: 9, size/record: 24, table size: 224

       .intvecs: algorithm=TMS570_CRC64_ISO(ID=10), load addr=00000000, size=00000020, CRC=1f7dab46cae46a4b

       flashAPI_Text: algorithm=TMS570_CRC64_ISO(ID=10), load addr=00000020, size=00001cc0, CRC=681efbb03fd28603

       .text: algorithm=TMS570_CRC64_ISO(ID=10), load addr=00001ce0, size=0003c720, CRC=608adbf01af3ea34

       .const: algorithm=TMS570_CRC64_ISO(ID=10), load addr=0003e400, size=00001ef8, CRC=41ace6b9b533be9b

       FEE_TEXT_SECTION: algorithm=TMS570_CRC64_ISO(ID=10), load addr=000402f8, size=00001df8, CRC=d33e7c3d359d84b8

       flashAPI_Const: algorithm=TMS570_CRC64_ISO(ID=10), load addr=000420f0, size=00000220, CRC=382cccd4e5d7e60b

       FEE_CONST_SECTION: algorithm=TMS570_CRC64_ISO(ID=10), load addr=00042310, size=000001a0, CRC=0208a83974856964

       .cinit: algorithm=TMS570_CRC64_ISO(ID=10), load addr=000424b0, size=00000bb0, CRC=033294923ac8e483

       .boot_info_section: algorithm=TMS570_CRC64_ISO(ID=10), load addr=0005fff8, size=00000008, CRC=1b00001b00000000

SW works well for the first 2 sections e CRC calculates and comparison match. But CRC module watchdog times out on the 3rd  section. Interrupt flags in CRC notification = 0x10.

The size of the section to calculate the CRC on is larger than in the example project. But I would expect still the CRC module to be able to handle that for large sections of memory.

Digging further the DMA transfer starts but stops PrtBChnSrcAddr == 0x1CF0. 

Executing the code further, ESM kicks in with an undef entry exception. 

ESMStat1 == 0x40,  ESMStat2 = 0x00, ESMStat3 = 0x080.

It suggest an uncorrectble error has been encountered. I tried disabling ECC and initializing the flash bank 0 where the code is running.

Unsuccessl so far.

Could you please point me into the right direction about the cause this behaviour ?

I can share part of if it is useful.