I still have some doubts about the diagnosis of Flash, It is mentioned in the safety manual that the correction data of Flash will not be written into FLASH? thanks a lot。

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I still have some doubts about the diagnosis of Flash, It is mentioned in the safety manual that the correction data of Flash will not be written into FLASH? thanks a lot。

If the correction data of FLASH is not written back to FLASH, then a single-bit error will be corrected every time it is read?
The function of the hardware error cache is to record the address where a single-bit error occurs(as long as a single-bit error will be recorded?). If only one address can be recorded, if a single-bit error occurs at other addresses, this address will not be recorded, and the corrected data at this address. It will not be written to FLASH, so will it trigger a single-bit error interrupt every time it is read?
I may still not understand the concept of hardware error cache, please answer my doubts
If the correction data of FLASH is not written back to FLASH, then a single-bit error will be corrected every time it is read?
If CPU reads from the same error address as last memory read, the CPU simply read from the cache instead of reading from the Flash since there is a match in the address. If CPU reads from a different flash address, it will read from flash, detect signal-bit ECC error, correct the data and save the corrected data to cache.
if a single-bit error occurs at other addresses, this address will not be recorded,
The new address and new corrected data are stored in the HW error cache.