TMS570LC4357: Debugging while cache is enabled

What registers shall be set to configure the cache for write-through?

I don't find this information on datasheet.

Thanks

Hi Alex,

MPU chapter in ARM TRM:

https://developer.arm.com/documentation/ddi0460/d/Memory-Protection-Unit

You can change it through HALCOGEN MPU configuration:

Alex Duranti said:

What registers shall be set to configure the cache for write-through?

If you only have a few variables which need to be monitored, and are not updated at a high rate, an alternative is insert code to perform a cache-clean on the address range of the global variables after each update. See 
CCS/RM57L843: Can not get the value of global variable in continuous refresh mode - CCS 7.1 Debug for an example.

I configure MPU as you proposed, but still have the same problem

Hi QJ, good morning and thanks for the support.

When i execute the proposed test my software stops at b prefetch entry line.

The same thing happen also if i try to execute a function in ram rather than in flash.

Alex

Just check my MPU setting. Sorry I copy/past a MPU setting for another HAL project. The correct one is:

This is my linker cmd file:

MEMORY
{
/* USER CODE BEGIN (2) */
/* USER CODE END */
VECTORS (X) : origin=0x00000000 length=0x00000020
FLASH0 (RX) : origin=0x00000020 length=0x001FFFE0
FLASH1 (RX) : origin=0x00200000 length=0x00200000
STACKS (RW) : origin=0x08000000 length=0x00001500
RAM (RW) : origin=0x08001500 length=0x0007db00

/* USER CODE BEGIN (3) */
/*RAM (RW) : origin=0x08001500 length=0x0007db00*/
SHAREDRAM (RW) : origin=0x0807F000 length=0x0001000
/* USER CODE END */
}

/* USER CODE BEGIN (4) */
/* USER CODE END */

/*----------------------------------------------------------------------------*/
/* Section Configuration */

SECTIONS
{
/* USER CODE BEGIN (5) */
/* USER CODE END */
.intvecs : {} > VECTORS
.text align(32) : {} > FLASH0 | FLASH1
.const align(32) : {} > FLASH0 | FLASH1
.cinit align(32) : {} > FLASH0 | FLASH1
.pinit align(32) : {} > FLASH0 | FLASH1
.bss : {} > RAM
.data : {} > RAM
.sysmem : {} > RAM

/* USER CODE BEGIN (6) */
.sharedRAM : {} > SHAREDRAM
/* USER CODE END */
}

Ok ,thanks, now i'm able to visualize the state of the variable in real time!

I have one other related issue:

Using the memory configuration as you propose, if i try to move a function in the ram memory, the software flow stucks at the following code line:

When software enter in the the function that shall be executed in the "sharedRAM" sections, my flows stops like in the image above.

I report also an example main flow to better explain my problem

Thanks

Alex

Hi Alex,

Using #pragma CODE_SECTION doesn't copy the code to RAM automatically. You have to allocate the code section to RAM, and copy the code to RAM manually.

1. Linker CMD file:

change the section .sharedRAM to:

.sharedRAM : RUN=SHAREDRAM, LOAD = FLASH0|FLASH1, LOAD_START(ulLoadStart), LOAD_SIZE(ulSize), RUN_START(ulRunStart)

2. In C file, for example startup.c

add the following variable defined in linker cmd file as global variable 

extern uint32 ulLoadStart;
extern uint32 ulSize;
extern uint32 ulStartAddr;

void _c_int00(void)

{

      ... ...

      memcpy(&ulRunStart, &ulLoadStart, (uint32)&ulSize);

      ... ...

      main();

}

Hi QJ,

I did what you have proposed above.

When the trampoline instruction of the function copied in ram is executed (i link the image of the assembler instruction), the software locks in the prefect entry instruction anyway.

Alex