Part Number: TM4C1294NCPDT
Hello,
we've been facing the bus fault issues described in the "Tiva reset problem" thread (Errata SYSCTL#22), the reason and suggested fixes are understood and straight forward.
I'm just wondering if and why this issue had been never fixed within the TIRTOS TIVAC software package. Within a TIRTOS enabled project the system clock initialization is done over Boot_sysCtlClockFreqSetI() before main() is called. The function is part of the /packages/ti/catalog/arm/cortexm4/tiva/ce/lib/Boot.aem4f library and implemented within Boot_sysctl.c which is mostly copied from TivaWare's SysCtlClockFreqSet() function located in sysctrl.c. As the TivaWare version deployed over tirtos_tivac_2_16_01_14 package is still 2.1.1.71b it doesn't include the fix for SYSCTL#22 (fixed for versions > 2.1.3).
Replacing content of Boot_sysCtlClockFreqSetI function with SysCtlClockFreqSet content of TivaWare 2.2.0.295 fixed the issue for us. This is not very straight forward, as the /packages/ti/catalog/arm/cortexm4/tiva/ce/lib/Boot.aem4f library needs to get recompiled by hand...
Are there any updates planned for tirtos_tivac package or is this a "dead horse"?
Thanks for any feedback
Jens