LP-AM243: GPIO Interrupt Question

AndreTseng

Part Number: LP-AM243

Hi,

I have question regarding to CPIOMUX0_INTROUTER0 setting in example: gpio_input_interrupt_am243x-lp_r5fss0-0_nortos_ti-arm-clang

In this example, we are using GPIO1_54 to trigger interrupt to R5FSS0_CORE0 through GPIOMUX_INTROUTER0_OUTP_8.

We using Sciclient_gpioIrqSet( ) to set interrupt router mux.

static void Sciclient_gpioIrqSet(void)
{
int32_t retVal;
struct tisci_msg_rm_irq_set_req rmIrqReq;
struct tisci_msg_rm_irq_set_resp rmIrqResp;

rmIrqReq.valid_params = 0U;
rmIrqReq.valid_params |= TISCI_MSG_VALUE_RM_DST_ID_VALID;
rmIrqReq.valid_params |= TISCI_MSG_VALUE_RM_DST_HOST_IRQ_VALID;
rmIrqReq.global_event = 0U;
rmIrqReq.src_id = TISCI_DEV_GPIO1;
rmIrqReq.src_index = TISCI_BANK_SRC_IDX_BASE_GPIO1 + GPIO_GET_BANK_INDEX(GPIO_PUSH_BUTTON_PIN);
rmIrqReq.dst_id = TISCI_DEV_R5FSS0_CORE0;
rmIrqReq.dst_host_irq = Board_getGpioButtonIntrNum();
rmIrqReq.ia_id = 0U;
rmIrqReq.vint = 0U;
rmIrqReq.vint_status_bit_index = 0U;
rmIrqReq.secondary_host = TISCI_MSG_VALUE_RM_UNUSED_SECONDARY_HOST;

retVal = Sciclient_rmIrqSet(&rmIrqReq, &rmIrqResp, SystemP_WAIT_FOREVER);
if(0 != retVal)
{
DebugP_log("[Error] Sciclient event config failed!!!\r\n");
DebugP_assert(FALSE);
}

return;
}

I have question about TISCI_BANK_SRC_IDX_BASE_GPIO1. In the code, we program it to 90U.

/** \brief bank interrupt source index base */
#define TISCI_BANK_SRC_IDX_BASE_GPIO0 (90U)
#define TISCI_BANK_SRC_IDX_BASE_GPIO1 (90U)
#define TISCI_BANK_SRC_IDX_BASE_MCU_GPIO0 (90U)

I'm wondering where is 90U coming from?

I checked TRM, I can not find answer.

Can you please help to clarify? Thanks.

Regards

Andre

over 3 years ago

0 AndreTseng over 3 years ago

TI__Intellectual 2555 points

Any feedback?

Regards

Andre

0 Frank Livingston over 3 years ago in reply to AndreTseng

TI__Mastermind 29388 points

Hi Andre,

The src_index parameter is for the Sciclient API function Sciclient_rmIrqSet(). Please see documentation here:

The src_index value is supposed to come from the following table, but the value 90 isn't in the table: https://software-dl.ti.com/tisci/esd/latest/5_soc_doc/am64x/interrupt_cfg.html#main-gpiomux-introuter0-interrupt-router-input-sources

There is an open e2e thread here on this topic, please see this post: https://e2e.ti.com/support/microcontrollers/arm-based-microcontrollers-group/arm-based-microcontrollers/f/arm-based-microcontrollers-forum/1078547/there-seems-to-be-an-error-in-the-calculation-of-the-gpiomux-interrupt-router-source-index-in-the-examples/3999415#3999415

The table values in the e2e post program the GPIO interrupt router as indicated. Thus, either the TISCI documentation is wrong, or Sciclient_rmIrqSet() isn't being correctly used in the GPIO interrupt example.

I'm reaching out to internal experts for clarification.

Regards,
Frank

0 AndreTseng over 3 years ago in reply to Frank Livingston

TI__Intellectual 2555 points

Frank,

Thanks for your reply. This table https://software-dl.ti.com/tisci/esd/latest/5_soc_doc/am64x/interrupt_cfg.html#interrupt-router-device-ids may explain

90 for GPIO0 and GPIO1

#define TISCI_BANK_SRC_IDX_BASE_GPIO0 (90U)
#define TISCI_BANK_SRC_IDX_BASE_GPIO1 (90U)

But it still can't explain

#define TISCI_BANK_SRC_IDX_BASE_MCU_GPIO0 (90U)

Base on this table bank interrupt base of MCU_GPIO0 is 30 not 90, right?

I'm looking forward for your feedback. Thanks a lot for your help.

Regards

Andre

0 Frank Livingston over 3 years ago in reply to AndreTseng

TI__Mastermind 29388 points

Hi Andre,

AndreTseng said:
This table https://software-dl.ti.com/tisci/esd/latest/5_soc_doc/am64x/interrupt_cfg.html#interrupt-router-device-ids may explain

Where are you looking in the tables? I would think the values for src_index would come from the "gpio_bank" Source Interfaces in this table: https://software-dl.ti.com/tisci/esd/latest/5_soc_doc/am64x/interrupt_cfg.html#main-gpiomux-introuter0-interrupt-router-input-sources

As I shared in the post above:

src_id=AM64X_DEV_GPIO1 & src_index=90 => IR Output programmed for Input #180
src_id=AM64X_DEV_GPIO0 & src_index=90 => IR Output programmed for Input #190

I discussed this further with internal experts on the SW dev team. I was told the documentation for Sciclient_rmIrqSet() isn't correct, and the semantics of the function parameters aren't properly described. My understanding is the documentation will be updated in the near future to clarify what the parameters mean.

AndreTseng said:
Base on this table bank interrupt base of MCU_GPIO0 is 30 not 90, right?

That seems correct based on the information in this table: https://software-dl.ti.com/tisci/esd/latest/5_soc_doc/am64x/interrupt_cfg.html#mcu-mcu-gpiomux-introuter0-interrupt-router-input-sources

Also, I tested this, and 30 can be used. Please see this e2e thread on this topic: https://e2e.ti.com/support/processors-group/processors/f/processors-forum/1087147/processor-sdk-am64x-gpio-interrupt-config-in-am64x-mcu-sdk-08-01-00

Note, however, this doesn't reconcile with the behavior & table for GPIOMUX_INTRTR0.

Regards,
Frank

+1 AndreTseng over 3 years ago in reply to Frank Livingston

TI__Intellectual 2555 points

Frank,

AndreTseng said:

This table https://software-dl.ti.com/tisci/esd/latest/5_soc_doc/am64x/interrupt_cfg.html#interrupt-router-device-ids may explain

Where are you looking in the tables?

I guess since Sciclient_gpioIrqSet( ) separates src_id and src_index of device, it may take 90 as offset of bank interrupt. But to be honest, it also don't make sense that this offset can not match definition in TRM. It's not easy to understand. To me TISCI_BANK_SRC_IDX_BASE_GPIO1 = 180 and TISCI_BANK_SRC_IDX_BASE_GPIO0 = 190 make more sense.

static void Sciclient_gpioIrqSet(void)
{
int32_t retVal;
struct tisci_msg_rm_irq_set_req rmIrqReq;
struct tisci_msg_rm_irq_set_resp rmIrqResp;

Regards

Andre

0 Frank Livingston over 3 years ago in reply to AndreTseng

TI__Mastermind 29388 points

Hi Andre,

Agreed, 180 and 190 would make more sense. Instead, we have 90 reused for TISCI_DEV_GPIO1 and TISCI_DEV_GPIO0.

I spoke with the SW dev team about this. They told me the semantics for the Sciclient_rmIrqSet() function aren't properly described in the documentation, and don't match up with the information in the table. The documentation will be updated in an upcoming release to clarify usage of Sciclient_rmIrqSet(). In the meantime, at least we know which values can be used to program the different IR routes.

Regards,
Frank

0 AndreTseng over 3 years ago in reply to Frank Livingston

TI__Intellectual 2555 points

Frank,

Thanks.

Regards

Andre

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LP-AM243: GPIO Interrupt Question