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Original question:

AM2432: Reset Related Questions

AM2432: How to handle MCU_RESETz and RESET_REQZ during power sequencing

Tony Tang
Mastermind 29602 points
Part Number: AM2432


What is requirement of  MCU_RESETz and RESET_REQZ during power up? From Schematic checklist, all reset input should hold LOW during power sequencing.

2.4 Reset
• Do you have a reset circuit that generates the proper reset signals into MCU_PORz, MCU_RESETz
and RESET_REQz?
The reset signals into MCU_PORz, MCU_RESETz and RESET_REQz must meet the requirements for pulse
length and must be held low during power sequencing.

But in SK Schematic, only MCU_PORz controlled by PMIC PGOOD,  MCU_RESETz and RESET_REQz are pulled to 3.3V and connect to test connector, they are not hold LOW as MCU_PORz during power sequencing.

Questions:

From SK Schematic, No need to hold MCU_RESETz and RESET_REQZ LOW during power sequencing? 

If the application doesn't need to control MCU or Main domain reset separately from external, just simply pull up MCU_RESETz and RESET_REQZ?

  • 0
    TI__Mastermind 24593 points

    Hello Tony,

    1) Correct, Power sequencing is dependent on the timing relationship between the supplies and MCU_PORz and MCU_OSC0_XI/XO.

    2) Yes these pins should be pulled up (External resistor provides a more robust solution, but configuring the internal pull up resistors is a valid option if no PCB signal trace is connected. The content below has been added to the Pin Connectivity Requirements table for the next datasheet release:

    Ball Number (Ball Name) Connection Requirements
    D10 (EMU0)
    E10 (EMU1)
    B12 (MCU_RESETz)
    E18 (RESET_REQz)
    B11 (TCK)
    C11 (TDI)
    C12 (TMS)    		 Each of these balls must be connected to the corresponding power
    supply(1) through separate external pull resistors to ensure these
    balls are held to a valid logic high level if a PCB signal trace
    is connected and not actively driven by an attached device. The
    internal pull-up may be used to hold a valid logic high level if no PCB
    signal trace is connected to the ball.

    (1) To determine which power supply is associated with any IO, see POWER column of the Pin Attributes table.

    Best Regards,

    Zackary Fleenor

  • 0 in reply to Fleenor
    TI__Mastermind 29602 points

    Zackary,

    So the Schematic check list (https://www.ti.com/lit/an/spracu5b/spracu5b.pdf))should be revised?

  • +1 in reply to Tony Tang
    TI__Mastermind 24593 points

    Hello Tony,

    Yes you are correct. Thank you for bringing this to our attention.

    It should read as follows:

    The MCU_PORz reset signal must meet the datasheet timing requirements and should be held low during power sequencing.

    The MCU_RESETz and RESET_REQz reset signals should be pulled high to the corresponding power
    supply through separate external pull resistors if unused.

    Best Regards,

    Zackary Fleenor

  • 0 in reply to Fleenor
    TI__Mastermind 24593 points

    Hey Tony, Can we close this ticket?