• State Resolved
  • Locked Locked
  • Replies 5 replies
  • Subscribers 31 subscribers
  • Views 371 views
  • Users 0 members are here
Support feedback
Options
Options
Similar topics

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

MCU-PLUS-SDK-AM243X: HSR/PRP ICSS FWHAL transmits on PRU1 only

Andrea Tessadri
Intellectual 567 points
Part Number: MCU-PLUS-SDK-AM243X
Other Parts Discussed in Thread: SYSCONFIG

I am trying to use your MCU-PLUS-SDK-AM243X just released on 25th March 2022.

I saw that there is support for HSR/PRP and also a dedicated demo example.

I have successfully adapted your example to our custom board based on AM234x.

I have connected my PC to the ethernet PHY attached to ICSSG0 PRU0 and, if I break into ethernet_input of LwIP, I can get packets coming from my host PC.

Unfortunately I don't see any packet from the board to my PC.

I inspected the code and I found that the function RedTxPacketEnqueue of hsrPrp_red_tx.c contains pointers to PRU1 RAM only (pruicssHwAttrs->pru1DramBase).

In such case I suppose every packet generated by the host will be forwarded to PRU1 instead of both PRU0 and PRU1.

Looking forward for your help.

  Andrea

  • 0
    TI__Mastermind 27154 points

    Hi
    Did you update the SysConfig file as well to select ICSSG0? SDK example uses ICSSG1.

    Did you update the PHY addresses in SysConfig's ETHPHY module according to your board specifications?

    If possible, can you share the .syscfg file you are using?

    Regards
    Dhaval Khandla


  • 0 in reply to Dhaval Khandla
    Intellectual 567 points
    Hi Dhaval,
        I did the required configuration changes to syscfg and I confirm that ICSSG0 receives packets from host PC on the configured PHY.
    LwIP link callback confirms link is UP.
    I cannot see Tx packets.
    How about pointer to PRU1DramBase ?
    I expected to have a selection between pru0DramBase or pru1DramBase in RedTxPacketEnqueue, according to which port is used for transmission
    Looking forward.
       Andrea
  • 0 in reply to Andrea Tessadri
    TI__Mastermind 36293 points

    Hi Andrea,

    Andrea Tessadri said:
    Here is my .syscfg: 

    I have tried building the application using the syscfg you shared, the build is failing.

    Also can you try const pruicss1   = pruicss.addInstance(); instead of const pruicss1   = pruicss.addInstance({}, false);  in your syscfg file

    Andrea Tessadri said:
    How about pointer to PRU1DramBase ?

    Queue descriptor are present in pru1Dram, and DRAM1 memory is used for both port. So we are using pru1DramBase for getting queue descriptors offset in RedTxPacketEnqueue of hsrPrp_red_tx.c file.

    Regards

    Nilabh Anand

  • +1 in reply to Nilabh Anand
    Intellectual 567 points

    Hi Nilabh,

       I've got the problem: I did a misconfiguration of PHYs assignment

    Fullscreen
    1
    2
    icssEmacParams.ethphyHandle[0] = gEthPhyHandle[CONFIG_100BTX];
    icssEmacParams.ethphyHandle[1] = gEthPhyHandle[CONFIG_TJA1101];
    XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX

    It depends how such macros are configured in syscfg, in my case:
    - CONFIG_100BTX = 0
    - CONFIG_TJA1101 = 1

    When it didn't work I had swapped the 2 phy, so not belonging to the right port of ICSSG

    Thanks

       Andrea

  • 0 in reply to Andrea Tessadri
    TI__Mastermind 36293 points

    Hi Andrea,

    Thanks for informing. Glad that it worked.

    Regards

    Nilabh Anand