• State Resolved
  • Locked Locked
  • Replies 2 replies
  • Subscribers 32 subscribers
  • Views 367 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

AM2432: FCLK, ICLK

Mari Tsunoda
Expert 5726 points

Part Number: AM2432

Hi Team,

My customer has a question as below.

  1. Can you tell me the specific meaning of *_FCLK and *_ICLK (how it is used in the block) and the frequency to set? For example, to toggle the GPIO at 5MHz, I think it is necessary to vary the GPIO_out register at 100ns cycles (equivalent to 10MHz), but how many MHz must GPIO_VBUS_FICLK be at or above? To run the external bus at 50MHz, the GPMC FCLK, ICLK must be at least how many MHz? For example.

Best regards,

Mari Tsunoda

  • +1
    TI__Expert 8400 points

    Hi Mari,

    GPIO does not have separate *_FCLK and *_ICLK signals, so I'm not sure if it is the best example for this, but nevertheless to answer your question:

    Like mentioned in this previous post:

    https://e2e.ti.com/support/microcontrollers/arm-based-microcontrollers-group/arm-based-microcontrollers/f/arm-based-microcontrollers-forum/1089206/am2432-gpmc-related-clock-questions

    When and IP has both _ICLK and _FCLK inputs then the _ICLK is used to manage communication between the peripheral (GPMC, MCSPI, etc) and the MCU, allowing operations like register writes and reads, and the _FCLK is the one that is used as input for the external communication configurable output clock, normally has multiple clock mux selections and can have extra divider steps. 

    For your specific example, the GPIO peripheral in AM2432 has a _FICLK that cannot be used for external devices and is only derived from MCU_SYSCLK0 divided by 4 --> 400MHz/4 = 100MHz. So from the system operating at 100MHz you could use timers to trigger an interrupt that toggles GPIO_out every 100ns to get an approximate 5MHz wave on the output. Same case for 50MHz, you would theoretically need an interrupt that triggers every 10ns. Taking in account system delays this would not be achievable at 100MHz so this cannot be done as the input to GPIO does not have clock source muxing for different clock inputs that would allow for a faster IP clock.

    Best,

    Daniel